IP Library Granted Patent US 7,577,203
Granted Patent B2
US 7,577,203 · App. 11/089,384 · Granted Aug 18, 2009

Minimizing non-deterministic noise by using wavelet transform

Assignee: Dell Products L.P.
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Quick Facts
Patent No.
US 7,577,203
App. No.
11/089,384
Filed
Mar 24, 2005
Granted
Aug 18, 2009
Kind
B2
Art Unit
2611
USPC
375/240.19
Abstract

A wavelet transform noise minimization circuit comprises a differential receiver, a voltage comparator, a wavelet transform circuit, an electrical idle (EI) detector circuit, a phase interpolator, a phase-locked-loop (PLL), and a reference clock buffer. The wavelet transform noise minimization circuit may be beneficially applied wherever there is non-deterministic (e.g., random) noise in the PHY layer during an electrical idle state. The wavelet transform noise minimization circuit may be used to improve noise margin during an electrical idle state, and/or reduce the occurrence of false activation of a PHY layer when in the electrical idle state.

Claims (47)

1. A method for minimizing the effect of non-deterministic noise during an idle condition of a serial data link in an information handling system, said method comprising the steps of:

a) detecting a non-deterministic noise signal of a serial data link;

b) comparing the non-deterministic noise signal to a noise threshold signal, wherein:

b1) if the non-deterministic noise signal is less than the noise threshold signal, then keeping the serial data link in an electrical idle state, and

b2) if the non-deterministic noise signal is greater than or equal to the noise threshold signal, then

b2a) decomposing the non-deterministic noise signal in a time domain,

b2b) decomposing the non-deterministic noise signal in a frequency domain,

b2c) determining a level of adaptive filtration for the time domain decomposed non-deterministic noise signal, and

b2d) determining equalizer tap settings for the frequency domain decomposed non-deterministic noise signal;

c) generating an output signal from the adaptively filtered time domain decomposed non-deterministic noise signal and the tap equalized frequency domain decomposed non-deterministic noise signal;

d) comparing the output signal to the non-deterministic noise signal, wherein:

d1) if the output signal is less than the non-deterministic noise signal, then keeping the serial data link in the electrical idle state, and

d2) if the output signal is greater than or equal to the non-deterministic noise signal, then repeating steps b2a, b2b, b2c, b2d, c, d, d1 and d2;

wherein each of the steps is performed in the information handling system.

2. The method of claim 1 , further comprising the step of coupling the non-deterministic noise signal to a PHY layer of the information handling system when the non-deterministic noise signal is less than the noise threshold signal.

3. The method of claim 1 , further comprising the step of coupling the output signal from the adaptively filtered time domain decomposed non-deterministic noise signal and the tap equalized frequency domain decomposed non-deterministic noise signal to a PHY layer of the information handling system when the non-deterministic noise signal is greater than or equal to the noise threshold signal.

4. The method of claim 1 , wherein the noise threshold signal is less than about 65 millivolts peak-to-peak.

5. The method of claim 1 , wherein the noise threshold signal is less than about 45 millivolts peak-to-peak.

6. An information handing system having a non-deterministic noise minimization circuit for improving noise margin of a serial data link electrical idle state, said system comprising:

an information handling system having a wavelet transform noise minimization circuit coupled to a serial data link, wherein the wavelet transform noise minimization circuit comprises:

a serial data receiver having an output, and an input coupled to the serial data link;

a voltage comparator having a first input coupled to the output of the serial data receiver;

a wavelet transform circuit having an input coupled to the output of the serial data receiver; and

an electrical idle detector circuit having a first input coupled to an output of the wavelet transform circuit, a second input coupled to an output of the voltage comparator, and an output coupled to a second input of the voltage comparator, wherein if a non-deterministic noise signal from the output of the serial data receiver is greater than or equal to a noise threshold signal from the output of the electrical idle detector circuit, then the wavelet transform circuit decomposes the non-deterministic noise signal into time and frequency domains, determines an adaptive filtration level for the time domain decomposed non-deterministic noise signal and equalizer tap settings for the frequency domain decomposed non-deterministic noise signal; and

the wavelet transform circuit generates an adaptively filtered time domain decomposed non-deterministic noise signal and the tap equalized frequency domain decomposed non-deterministic noise signal at its output which is coupled to the first input of the electrical idle detector circuit.

7. The information handing system according to claim 6 , wherein the non-deterministic noise signal is coupled to a PHY layer of the information handling system when the non-deterministic noise signal is less than the noise threshold signal during an electrical idle state.

8. The information handing system according to claim 6 , wherein a second output of the wavelet transform circuit is coupled to a PHY layer of the information handling system when the non-deterministic noise signal is greater than or equal to the noise threshold signal during an electrical idle state.

9. The information handing system according to claim 6 , wherein the output of the wavelet transform circuit comprises an inverted, noise cleaned, filtered and equalized version of the non-deterministic noise signal.

10. The information handing system according to claim 9 , wherein the inverted, noise cleaned, filtered and equalized version of the non-deterministic noise signal is generated by the wavelet transform circuit using an inverse wavelet transform to the time domain.

11. The information handing system according to claim 10 , wherein the wavelet transform circuit decomposes and analyzes the non-deterministic noise signal substantially simultaneously in both the time and frequency domains.

12. The information handing system according to claim 6 , further comprising a clock buffer coupled to a system clock.

13. The information handing system according to claim 12 , further comprising a phase-locked-loop (PLL) coupled to an output of the clock buffer wherein the PLL coherently multiplies a frequency of the system clock.

14. The information handing system according to claim 13 , further comprising a phase interpolator coupled to an output of the PLL, wherein the phase interpolator generates a plurality of phase coherent clock signals.

15. The information handing system according to claim 13 , wherein outputs of the phase interpolator are coupled to the serial data receiver and the electrical idle detector.

16. The information handing system according to claim 6 , wherein the noise threshold signal is less than about 65 millivolts peak-to-peak.

17. The information handing system according to claim 6 , wherein the noise threshold signal is less than about 45 millivolts peak-to-peak.

18. The information handing system according to claim 6 , wherein the serial data receiver input is a differential input.

19. An apparatus for wavelet transform noise minimization, comprising:

a serial data receiver having an output, and an input adapted for coupling to a serial data link;

a voltage comparator having a first input coupled to the output of the serial data receiver;

a wavelet transform circuit having an input coupled to the output of the serial data receiver; and

an electrical idle detector circuit having a first input coupled to an output of the wavelet transform circuit, a second input coupled to an output of the voltage comparator, and an output coupled to a second input of the voltage comparator, wherein if a non-deterministic noise signal from the output of the serial data receiver is greater than or equal to a noise threshold signal from the output of the electrical idle detector circuit, then the wavelet transform circuit decomposes the non-deterministic noise signal into time and frequency domains, determines an adaptive filtration level for the time domain decomposed non-deterministic noise signal and equalizer tap settings for the frequency domain decomposed non-deterministic noise signal; and

the wavelet transform circuit generates an adaptively filtered time domain decomposed non-deterministic noise signal and the tap equalized frequency domain decomposed non-deterministic noise signal at its output which is coupled to the first input of the electrical idle detector circuit.

20. The apparatus according to claim 19 , wherein the output of the wavelet transform circuit comprises an inverted, noise cleaned, filtered and equalized version of the non-deterministic noise signal.

21. The apparatus according to claim 20 , wherein the inverted, noise cleaned, filtered and equalized version of the non-deterministic noise signal is generated by the wavelet transform circuit using an inverse wavelet transform to the time domain.

22. The apparatus according to claim 21 , wherein the wavelet transform circuit decomposes and analyzes the non-deterministic noise signal substantially simultaneously in both the time and frequency domains.

23. The apparatus according to claim 19 , wherein a second output of the wavelet transform circuit is adapted for coupling to a PHY layer of an information handling system when the non-deterministic noise signal is greater than or equal to the noise threshold signal during an electrical idle state.

Assignments (15)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (053546/0001) Recorded Jun 23, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL MARKETING L.P. (ON BEHALF OF ITSELF AND AS SUCCESSOR-IN-INTEREST TO CREDANT TECHNOLOGIES, INC.); DELL INTERNATIONAL L.L.C.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; DELL MARKETING CORPORATION (SUCCESSOR-IN-INTEREST TO FORCE10 NETWORKS, INC. AND WYSE TECHNOLOGY L.L.C.); EMC IP HOLDING COMPANY LLC
Reel/Frame 071642/0001 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (045455/0001) Recorded May 20, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL MARKETING CORPORATION (SUCCESSOR-IN-INTEREST TO ASAP SOFTWARE EXPRESS, INC.); DELL MARKETING L.P. (ON BEHALF OF ITSELF AND AS SUCCESSOR-IN-INTEREST TO CREDANT TECHNOLOGIES, INC.); DELL USA L.P.; DELL INTERNATIONAL L.L.C.; DELL PRODUCTS L.P.; DELL MARKETING CORPORATION (SUCCESSOR-IN-INTEREST TO FORCE10 NETWORKS, INC. AND WYSE TECHNOLOGY L.L.C.); EMC CORPORATION (ON BEHALF OF ITSELF AND AS SUCCESSOR-IN-INTEREST TO MAGINATICS LLC); EMC IP HOLDING COMPANY LLC (ON BEHALF OF ITSELF AND AS SUCCESSOR-IN-INTEREST TO MOZY, INC.); SCALEIO LLC
Reel/Frame 061753/0001 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (040136/0001) Recorded Apr 26, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL MARKETING CORPORATION (SUCCESSOR-IN-INTEREST TO ASAP SOFTWARE EXPRESS, INC.); DELL MARKETING L.P. (ON BEHALF OF ITSELF AND AS SUCCESSOR-IN-INTEREST TO CREDANT TECHNOLOGIES, INC.); DELL USA L.P.; DELL INTERNATIONAL L.L.C.; DELL PRODUCTS L.P.; DELL MARKETING CORPORATION (SUCCESSOR-IN-INTEREST TO FORCE10 NETWORKS, INC. AND WYSE TECHNOLOGY L.L.C.); EMC CORPORATION (ON BEHALF OF ITSELF AND AS SUCCESSOR-IN-INTEREST TO MAGINATICS LLC); EMC IP HOLDING COMPANY LLC (ON BEHALF OF ITSELF AND AS SUCCESSOR-IN-INTEREST TO MOZY, INC.); SCALEIO LLC
Reel/Frame 061324/0001 →
RELEASE OF SECURITY INTEREST Recorded Nov 3, 2021
From: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
To: ASAP SOFTWARE EXPRESS, INC.; AVENTAIL LLC; CREDANT TECHNOLOGIES, INC.; DELL USA L.P.; DELL INTERNATIONAL, L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL SOFTWARE INC.; DELL SYSTEMS CORPORATION; EMC CORPORATION; EMC IP HOLDING COMPANY LLC; FORCE10 NETWORKS, INC.; MAGINATICS LLC; MOZY, INC.; SCALEIO LLC; WYSE TECHNOLOGY L.L.C.
Reel/Frame 058216/0001 →
SECURITY AGREEMENT Recorded Apr 22, 2020
From: CREDANT TECHNOLOGIES INC.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; FORCE10 NETWORKS, INC.; WYSE TECHNOLOGY L.L.C.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
Reel/Frame 053546/0001 →
SECURITY AGREEMENT Recorded Mar 21, 2019
From: CREDANT TECHNOLOGIES, INC.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; FORCE10 NETWORKS, INC.; WYSE TECHNOLOGY L.L.C.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
Reel/Frame 049452/0223 →
SECURITY AGREEMENT Recorded Sep 21, 2016
From: ASAP SOFTWARE EXPRESS, INC.; AVENTAIL LLC; CREDANT TECHNOLOGIES, INC.; DELL USA L.P.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL SOFTWARE INC.; DELL SYSTEMS CORPORATION; EMC CORPORATION; EMC IP HOLDING COMPANY LLC; FORCE10 NETWORKS, INC.; MAGINATICS LLC; MOZY, INC.; SCALEIO LLC; SPANNING CLOUD APPS LLC; WYSE TECHNOLOGY L.L.C.
To: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH, AS COLLATERAL AGENT
Reel/Frame 040134/0001 →
SECURITY AGREEMENT Recorded Sep 21, 2016
From: ASAP SOFTWARE EXPRESS, INC.; AVENTAIL LLC; CREDANT TECHNOLOGIES, INC.; DELL USA L.P.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL SOFTWARE INC.; DELL SYSTEMS CORPORATION; EMC CORPORATION; EMC IP HOLDING COMPANY LLC; FORCE10 NETWORKS, INC.; MAGINATICS LLC; MOZY, INC.; SCALEIO LLC; SPANNING CLOUD APPS LLC; WYSE TECHNOLOGY L.L.C.
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 040136/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 14, 2016
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: DELL MARKETING L.P.; ASAP SOFTWARE EXPRESS, INC.; APPASSURE SOFTWARE, INC.; COMPELLENT TECHNOLOGIES, INC.; CREDANT TECHNOLOGIES, INC.; DELL INC.; DELL PRODUCTS L.P.; DELL USA L.P.; DELL SOFTWARE INC.; FORCE10 NETWORKS, INC.; PEROT SYSTEMS CORPORATION; SECUREWORKS, INC.; WYSE TECHNOLOGY L.L.C.
Reel/Frame 040040/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 14, 2016
From: BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS COLLATERAL AGENT
To: DELL MARKETING L.P.; ASAP SOFTWARE EXPRESS, INC.; APPASSURE SOFTWARE, INC.; COMPELLENT TECHNOLOGIES, INC.; CREDANT TECHNOLOGIES, INC.; DELL INC.; DELL PRODUCTS L.P.; DELL USA L.P.; DELL SOFTWARE INC.; FORCE10 NETWORKS, INC.; PEROT SYSTEMS CORPORATION; SECUREWORKS, INC.; WYSE TECHNOLOGY L.L.C.
Reel/Frame 040065/0618 →
RELEASE OF SECURITY INTEREST Recorded Sep 13, 2016
From: BANK OF AMERICA, N.A., AS ADMINISTRATIVE AGENT
To: DELL MARKETING L.P.; ASAP SOFTWARE EXPRESS, INC.; APPASSURE SOFTWARE, INC.; COMPELLANT TECHNOLOGIES, INC.; CREDANT TECHNOLOGIES, INC.; DELL INC.; DELL PRODUCTS L.P.; DELL USA L.P.; DELL SOFTWARE INC.; FORCE10 NETWORKS, INC.; PEROT SYSTEMS CORPORATION; SECUREWORKS, INC.; WYSE TECHNOLOGY L.L.C.
Reel/Frame 040065/0216 →
PATENT SECURITY AGREEMENT (ABL) Recorded Jan 2, 2014
From: DELL INC.; APPASSURE SOFTWARE, INC.; ASAP SOFTWARE EXPRESS, INC.; BOOMI, INC.; COMPELLENT TECHNOLOGIES, INC.; CREDANT TECHNOLOGIES, INC.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL SOFTWARE INC.; DELL USA L.P.; FORCE10 NETWORKS, INC.; GALE TECHNOLOGIES, INC.; PEROT SYSTEMS CORPORATION; SECUREWORKS, INC.; WYSE TECHNOLOGY L.L.C.
To: BANK OF AMERICA, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 031898/0001 →
PATENT SECURITY AGREEMENT (TERM LOAN) Recorded Jan 2, 2014
From: DELL INC.; APPASSURE SOFTWARE, INC.; ASAP SOFTWARE EXPRESS, INC.; BOOMI, INC.; COMPELLENT TECHNOLOGIES, INC.; CREDANT TECHNOLOGIES, INC.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL SOFTWARE INC.; DELL USA L.P.; FORCE10 NETWORKS, INC.; GALE TECHNOLOGIES, INC.; PEROT SYSTEMS CORPORATION; SECUREWORKS, INC.; WYSE TECHNOLOGY L.L.C.
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 031899/0261 →
PATENT SECURITY AGREEMENT (NOTES) Recorded Jan 2, 2014
From: APPASSURE SOFTWARE, INC.; ASAP SOFTWARE EXPRESS, INC.; BOOMI, INC.; COMPELLENT TECHNOLOGIES, INC.; CREDANT TECHNOLOGIES, INC.; DELL INC.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL SOFTWARE INC.; DELL USA L.P.; FORCE10 NETWORKS, INC.; GALE TECHNOLOGIES, INC.; PEROT SYSTEMS CORPORATION; SECUREWORKS, INC.; WYSE TECHNOLOGY L.L.C.
To: BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS FIRST LIEN COLLATERAL AGENT
Reel/Frame 031897/0348 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 24, 2005
From: MURUGAN, RAJEN; PATEL, BHAVESH A.
To: DELL PRODUCTS L.P.
Reel/Frame 016420/0863 →
Continuity (1)
Related Publication 20060215794A1 · Sep 28, 2006