Method for determining time dependent dielectric breakdown

1. A method of determining a time dependent electrical breakdown characteristic of a dielectric layer in a semiconductor device comprising:

providing a plurality of samples of dielectric layer disposed as a gate dielectric layer of a MOS transistor;

performing a first linear regression fit on data representing a logarithm of a source/drain current density distribution and data representing a logarithm of voltages applied on said samples;

performing a second linear regression fit on data representing a logarithm of a substrate current density distribution and the data representing the logarithm of voltages applied on said samples;

performing a third linear regression fit on data representing a logarithm of a dielectric layer lifetime distribution and second data representing a logarithm of the source/drain current density distribution and the substrate current density distribution on said samples;

deriving, from said first, second, and third linear regression fits, an empirical model wherein a dielectric layer lifetime is a function of voltage applied thereon; and

using said model to determine dielectric layer lifetime at a pre-determined operating gate voltage.

2. The method according to claim 1 , wherein said samples of dielectric layer having substantially the same respective thicknesses.

3. The method of claim 1 , wherein said steps of performing a first linear regression fit and performing a second linear regression fit include:

applying to a first plurality of said samples gate voltage in an incremental manner and measuring source/drain current density and substrate current density at said incremental gate voltages;

plotting data of measured source/drain and substrate current density at said incremental gate voltages; and

fitting said data and obtaining a first and a second functions.

4. The method of claim 3 , wherein said first and said second functions are power law functions.

5. The method of claim 3 , wherein said first and said second functions are exponential functions.

6. The method of claim 1 , wherein said step of performing a third linear regression fit includes:

applying to a second plurality of said samples a stress voltage and measuring, on each sample of said second plurality, gate leakage current density and time to breakdown;

plotting data of measured times to breakdown at said gate leakage current density; and

fitting said data and obtaining a third function.

7. The method of claim 6 , wherein said third function is a power law function.

8. The method of claim 6 , wherein said third function is an exponential function.

9. The method of claim 1 , wherein said step of deriving, from said first, second, and third linear regression fits, an empirical model wherein a dielectric layer lifetime is a function of voltage applied thereon, yields a function in the form of T bd ˜V g −n , wherein T bd is dielectric layer lifetime, V g is applied voltage and n is a constant.

10. The method of claim 9 , wherein n has a different value in different regions of said incremental gate voltages.

11. The method of claim 1 , wherein said step of deriving, from said first, second, and third linear regression fits, an empirical model wherein a dielectric layer lifetime is a function of voltage applied thereon, yields a function in the form of T bd ˜e −γVg , wherein T bd is a dielectric layer lifetime, V g is an applied voltage, and γ is a constant.

12. The method of claim 11 , wherein said constant γ has a different value in different regions of said incremental gate voltages.

13. A method of determining the lifetime of a dielectric layer in a semiconductor device comprising:

providing samples of dielectric layers having substantially the same thickness disposed as respective gate dielectric layers of a plurality of MOS transistors;

applying to a first plurality of said samples gate voltages in an incremental manner and measuring source/drain current density and substrate current density at each of said incremental gate voltages;

performing a first linear regression fit on data representing a logarithm of a source/drain current density distribution and data representing said incremental gate voltages;

performing a second linear regression fit on data representing a logarithm of a substrate current density distribution and the data representing said incremental gate voltages;

applying to a second plurality of said samples a stress voltage and measuring, on each sample, source/drain current density, substrate current density and time to breakdown;

performing a third linear regression fit on data representing a logarithm of a dielectric layer lifetime distribution and second data representing a logarithm of the source/drain and the substrate current density distribution; and

deriving from said first, second, and third linear regression fits a model describing the relationship between time to breakdown and gate voltage applied thereon and estimating there from a dielectric layer lifetime at a pre-determined operating gate voltage.

14. The method of claim 13 , wherein said steps of performing a first and a second linear regression fits include:

obtaining a linear distribution plotting said source/drain current density and said substrate current density at each of said incremental gate voltages;

fitting said distribution using a linear regression line; and

obtaining a slope of said linear regression line.

15. The method of claim 14 , wherein said linear distribution is between said source/drain and substrate current density in logarithmic scale and said gate voltages in linear scale and said step of fitting said distribution using a linear regression line yields linear regression lines in the forms of ln J sd ˜S 1 V g , and ln J sub ˜S 2 V g wherein J sd is a source/drain current density, J sub is a substrate current density, V g is an applied voltage, and S 1 and S 2 are constant.

16. The method of claim 15 , wherein J sub is negligibly small and said step of fitting said distribution using a linear regression line yields a linear regression line in the form of ln J g =ln J sd ˜SV g , wherein J sd is a source/drain current density, V g is an applied voltage, and S is a constant.

17. The method of claim 15 , wherein said constant S 1 and S 2 have different values in different regions of gate voltage values, respectively.

18. The method of claim 13 , wherein said step of performing a third linear regression fit includes:

obtaining a linear distribution plotting said source/drain current density, said substrate current density and times to breakdown;

fitting said distribution using a linear regression line; and

obtaining a slope of said linear regression line.

19. The method of claim 18 , wherein said linear distribution is between said times to breakdown and said source/drain and said substrate current densities in logarithmic scale and said step of fitting said distribution using a linear regression line yields a linear regression line in the form of ln T bd ˜−m ln(J sd J sub )=−m ln J g , wherein T bd is a dielectric layer lifetime, J g is a gate leakage current density, J sd is a source/drain current density, J sub is a substrate current density, and m is a constant.

20. The method of claim 18 , wherein said substrate current density is negligibly small and fitting said distribution using a linear regression line yields a linear regression line in the form of ln T bd ˜−m ln J sd =−m ln J g , wherein T bd is a dielectric layer lifetime, J g is a gate leakage current density, J sd is a source/drain current density, and m is a constant.

21. The method of claim 13 , wherein said step of deriving a model describing the relationship between times to breakdown and gate voltage applied thereon yields a function in the form of T bd ˜V g −n , wherein T bd is a dielectric layer lifetime, V g is an applied voltage, and n is a constant.

22. The method of claim 21 , wherein n has a different value in different regions of said gate voltage values.

23. A method of determining the lifetime of a gate dielectric layer in a MOS transistor comprising:

providing a plurality of MOS transistors each having gate dielectric layer of same material;

applying to a first plurality of said transistors gate voltages in an incremental manner and measuring source/drain current density and substrate current density at each of said incremental gate voltages;

performing a first linear regression fit on data representing a logarithm of said source/drain current density and data representing a logarithm of said gate voltages;

performing a second linear regression fit on data representing a logarithm of said substrate current density and the data representing a logarithm of said gate voltages;

obtaining a first function from the first linear regression fit describing a relationship between said gate voltages and said source/drain current density;

obtaining a second function from the second linear regression fit describing a relationship between said gate voltages and said substrate current density;

applying to a second plurality of said transistors a stress voltage and measuring, on each sample, source/drain current density, substrate current density and time to breakdown;

performing a third linear regression fit on data representing a logarithm of a dielectric layer lifetime distribution and second data representing a logarithm of the source/drain current density and the substrate current density on said second plurality of said transistors;

obtaining a third function describing a relationship between said source/drain current density, said substrate current density and times to breakdown on said second plurality of said transistors; and

obtaining a fourth function describing a relationship between said gate voltages and the times to breakdown and estimating a dielectric layer lifetime at a pre-determined operating gate voltage.

24. The method of claim 23 , wherein said MOS transistors each having gate dielectric layers of substantially same thickness.

25. A method of determining the lifetime of a gate dielectric layer in a MOS transistor comprising:

providing a plurality of MOS transistors each having gate dielectric layer of a same material;

applying to a first plurality of said transistors gate voltages in an incremental manner and measuring source/drain current density at each of said incremental gate voltages;

performing a first linear regression fit on data representing a logarithm of said source/drain current density and data representing said gate voltages;

obtaining a first function from the first linear regression fit describing a relationship between said gate voltages and said source/drain current density;

applying to a second plurality of said transistors a stress voltage and measuring, on each sample, source/drain current density and time to breakdown;

performing a second linear regression fit on data representing a logarithm of a dielectric layer lifetime distribution and data representing a logarithm of the source/drain current density on said second plurality of said transistors;

obtaining a second function describing relationships between said source/drain current density and times to breakdown on said second plurality of said transistors; and

obtaining a third function describing a relationship between the gate voltages and the times to breakdown and estimating a dielectric layer lifetime at a pre-determined operating gate voltage.