IP Library Granted Patent US 7,590,390
Granted Patent B2
US 7,590,390 · App. 11/624,669 · Granted Sep 15, 2009

Method and apparatus for signal power loss reduction in RF communication systems

Assignee: Atheros Communications, Inc.
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Quick Facts
Patent No.
US 7,590,390
App. No.
11/624,669
Granted
Sep 15, 2009
Kind
B2
Abstract

Multiple power amplifiers in an RF front end are coupled to multiple antennas without diversity switching between the PAs and antennas. Diversity switches direct signals to broadcast by a selected antenna to a PA coupled to the selected antenna. Multiple LNAs are similarly coupled to the diverse antennas. Having one PA and LNA set for each antenna removes the need for diversity switching between the PA/LNAs and each antenna improving signal reception. In one embodiment, a single external PA performs broadcast functions and plural on-chip LNAs are used for reception. In another embodiment, phase shifters are coupled to each PA and LNA, which provide beam forming capability for broadcasts, and in phase signal combinations for received signals.

Claims (50)

1. An RF front end comprising:

a power amplifier;

a first ¼ wavelength wire, the first ¼ wavelength wire connected between an antenna and an output of the power amplifier;

a low noise amplifier;

a second ¼ wavelength wire, the second ¼ wavelength wire connected between the antenna and an input of the low noise amplifier; and

a shunt switch connected between the output of the power amplifier and the first ¼ wavelength wire, the shunt switch being closed during a receive operation and being open during a transmit operation.

2. The RF front end of claim 1 , wherein the power amplifier, the low noise amplifier, and the shunt switch are implemented on an integrated circuit.

3. An RF front end comprising:

a power amplifier;

a first network component providing functionality equivalent to ¼ wavelength wire, the first network component connected between an antenna and an output of the power amplifier;

a low noise amplifier;

a second network component providing functionality equivalent to ¼ wavelength wire, the second network component connected between the antenna and an input of the low noise amplifier; and

a shunt switch connected between the output of the power amplifier and the first network component, the shunt switch being closed during a receive operation and being open during a transmit operation.

4. The RF front end of claim 3 , wherein the power amplifier, the low noise amplifier, and the shunt switch are implemented on an integrated circuit.

5. An RF front end comprising:

a power amplifier;

a first lump element circuit connected between an antenna and an output of the power amplifier;

a low noise amplifier;

a second lump element circuit connected between the antenna and an input of the low noise amplifier; and

a shunt switch connected between the output of the power amplifier and the first lump element circuit, the shunt switch being closed during a receive operation and being open during a transmit operation,

wherein when the shunt switch is closed, a first end of the first lump element is shorted to ground, thereby causing a second end of the first lump element to appear as an open circuit.

6. The RF front end of claim 5 , wherein the power amplifier, the low noise amplifier, and the shunt switch are implemented on an integrated circuit.

7. An RF front end comprising:

a power amplifier;

a first passive element connected between an antenna and an output of the power amplifier;

a low noise amplifier;

a second passive element connected between the antenna and an input of the low noise amplifier; and

a shunt switch connected between the output of the power amplifier and the first passive element, the shunt switch being closed during a receive operation and being open during a transmit operation,

wherein when the shunt switch is closed, a first end of the first passive element is shorted to ground, thereby causing a second end of the first passive element to appear as an open circuit and minimizing loss onto transmit circuitry during the receive operation.

8. The RF front end of claim 7 , wherein the power amplifier, the low noise amplifier, and the shunt switch are implemented on an integrated circuit.

9. An RF front end, comprising:

a plurality of antenna ports;

a plurality of low noise amplifiers (LNAs), each LNA configured to receive signals from at least one of the plurality of antenna ports;

a plurality of mixers, each mixer receiving an output signal associated with one of the plurality of LNAs and a local oscillator signal for phase shifting the output signal; and

an adder that receives mixed signals from the plurality of mixers,

wherein for two LNAs and two corresponding mixers, a first mixer receives an I component of the local oscillator signal and a second mixer receives a Q component of the local oscillator signal.

10. An RF front end, comprising:

a plurality of antenna ports;

a plurality of low noise amplifiers (LNAs), each LNA configured to receive signals from at least one of the plurality of antenna ports;

a plurality of mixers, each mixer receiving an output signal associated with one of the plurality of LNAs and a local oscillator signal for phase shifting the output signal;

a combiner coupled between the plurality of LNAs and the plurality of mixers; and

an adder that receives mixed signals from the plurality of mixers,

wherein for two LNAs generating signals A and B, respectively, the combiner generates signals x and y, wherein (x,y) ∈{(A, 0 ), (B, 0 ), (A+B, 0 ), (−A+B, 0 ), (A,B), (−A,B)}.

11. The RF front end of claim 10 , wherein for two mixers in which a first mixer receives the signal x and an I component of the local oscillator signal and a second mixer receives the signal y and a Q component of the local oscillator signal, the adder generates a signal z, wherein z ∈{A, B, A+B, −A+B, A+jB, −A+jB}, wherein j 2 =−1.

12. The RF front end of claim 11 , wherein the second mixer is selectively powered on only when z=+/−A+JB.

13. A transmitter for a wireless device, the transmitter comprising:

a first power amplifier receiving an input differential signal and generating a first pair of output signals, the first power amplifier further receiving a first control signal for driving a signal path in the first power amplifier one of in phase and complementary phase;

a first output device driven by the first pair of output signals of the first amplifier, the first output device generating a first output differential signal;

a second power amplifier receiving the input differential signal and generating a second pair of output signals, the second power amplifier further receiving a second control signal for driving a signal path in the second power amplifier one of in phase and complementary phase; and

a second output device driven by the second pair of output signals of the second amplifier, the second output device generating a second output differential signal.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 15, 2015
From: WEBER, DAVID; SU, DAVID
To: ATHEROS COMMUNICATIONS, INC.
Reel/Frame 036571/0214 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 20, 2011
From: ATHEROS COMMUNICATIONS, INC.
To: THE CONNECTIVITY PATENT TRUST
Reel/Frame 026317/0659 →
Continuity (2)
Continuation 1021769900 · Aug 13, 2002
Related Publication 20070117523A1 · May 24, 2007