IP Library › Granted Patent US 7,592,647
Granted Patent B2
US 7,592,647 · App. 11/392,639 · Granted Sep 22, 2009

Semiconductor device and manufacturing method thereof

Assignee: Eudyna Devices Inc.
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Quick Facts
Patent No.
US 7,592,647
App. No.
11/392,639
Granted
Sep 22, 2009
Kind
B2
Abstract

A semiconductor device includes a GaN-based semiconductor layer that is formed on a substrate and an opening region, an electron conduction layer formed on an inner surface of the opening region, an electron supply layer that has a larger band gap than the electron conduction layer and is formed on the electron conduction layer disposed on the inner surface of the opening region, and a gate electrode formed on a side surface of the electron supply layer in the opening region. A source electrode is formed on the GaN-based semiconductor layer. A drain electrode is connected to a surface of the GaN-based semiconductor layer opposite to the source electrode.

Claims (20)

1. A semiconductor device including:

a GaN-based semiconductor layer that is formed on a substrate and has an opening region;

an electron conduction layer formed on an inner surface of the opening region;

an electron supply layer that has a larger band gap than the electron conduction layer and is formed on the electron conduction layer disposed on the inner surface of the opening region;

a source electrode formed on the GaN-based semiconductor layer;

a drain electrode formed on a back surface of the substrate; and

an AlN layer between the electron conduction layer and the electron supply layer.

2. The semiconductor device as claimed in claim 1 , wherein: the GaN-based semiconductor layer includes a P-type GaN-based semiconductor layer;

at least the P-type GaN-based semiconductor layer is removed in the opening region; and

the electron conduction layer formed on the P-type GaN-based semiconductor layer exposed in an inner surface of the opening region.

3. The semiconductor device as claimed in claim 2 wherein

wherein the GaN-based semiconductor layer includes a first N-type GaN-based semiconductor layer and a second N-type GaN-based semiconductor layer with the P-type GaN-based semiconductor layer being interposed therebetween.

4. The semiconductor device as claimed in claim 2 , wherein the P-type GaN-based semiconductor layer is at least either a GaN layer or an AlGaN layer.

5. The semiconductor device as claimed in claim 1 , wherein:

the electron conduction layer is an In x2 Al y2 Ga (1-x2-y2) N layer;

the electron supply layer is an In X1 Al y1 Ga (1-x1-y1) N layer, and;

relationships (0≦x2, y2, x1, y1≦1) and 2.81(y1−y2)−1.50(x1−x2)>0 are satisfied.

6. The semiconductor device as claimed in claim 1 , wherein the electron conduction layer is made of either GaN or InGaN and the electron supply layer is made of an AlGaN.

7. The semiconductor device as claimed in claim 1 , wherein the electron conduction layer has a film thickness of 5 to 100 nm.

8. The semiconductor device as claimed in claim 1 , wherein the substrate is a silicon carbide (SiC) substrate, a sapphire substrate, a silicon substrate or a substrate including GaN.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 30, 2006
From: NAKATA, KEN; KAWASAKI, TAKESHI; YAEGASHI, SEIJI
To: EUDYNA DEVICES INC.
Reel/Frame 017745/0194 →
Priority Claims (1)
JP 2005-104984 · Mar 31, 2005 · national
Continuity (1)
Related Publication 20060220060A1 · Oct 5, 2006