Power semiconductor device

1. A power semiconductor device comprising:

a semiconductor substrate;

a gate insulating film;

a control electrode insulated from the semiconductor substrate by the gate insulating film;

a first main electrode provided on a lower surface side of the semiconductor substrate; and

a second main electrode provided on an upper surface side of the semiconductor substrate,

the semiconductor substrate including:

a first first-conductivity-type semiconductor layer with its lower surface connected to the first main electrode;

a second first-conductivity-type semiconductor layer and a third second-conductivity-type semiconductor layer formed on the first first-conductivity-type semiconductor layer and alternately arranged parallel to the upper surface of the semiconductor substrate;

a trench formed in a directly overlying region of the third second-conductivity-type semiconductor layer, with part of the second main electrode buried in the trench;

a fourth second-conductivity-type semiconductor layer selectively formed in a surface of the second first-conductivity-type semiconductor layer and connected to the second main electrode;

a fifth first-conductivity-type semiconductor layer selectively formed in a surface of the fourth second-conductivity-type semiconductor layer and connected to the second main electrode; and

a sixth second-conductivity-type semiconductor layer formed at a bottom of the trench and connected to the second main electrode,

impurity concentration in the sixth second-conductivity-type semiconductor layer being higher than impurity concentration in the fourth second-conductivity-type semiconductor layer, and

lower surface of the sixth second-conductivity-type semiconductor layer being located below lower surface of the fourth second-conductivity-type semiconductor layer.

2. The power semiconductor device according to claim 1 , wherein

impurity amount in at least one of the second first-conductivity-type semiconductor layer and the third second-conductivity-type semiconductor layer varies in thickness direction of the semiconductor substrate,

in an upper part of a portion composed of the second first-conductivity-type semiconductor layer and the third second-conductivity-type semiconductor layer, the impurity amount in the third second-conductivity-type semiconductor layer is larger than the impurity amount in the second first-conductivity-type semiconductor layer, and

in a lower part of the portion composed of the second first-conductivity-type semiconductor layer and the third second-conductivity-type semiconductor layer, the impurity amount in the third second-conductivity-type semiconductor layer is smaller than the impurity amount in the second first-conductivity-type semiconductor layer.

3. The power semiconductor device according to claim 2 , wherein impurity amount in at least one of the second first-conductivity-type semiconductor layer and the third second-conductivity-type semiconductor layer varies continuously in thickness direction of the semiconductor substrate.

4. The power semiconductor device according to claim 2 , wherein impurity amount in at least one of the second first-conductivity-type semiconductor layer and the third second-conductivity-type semiconductor layer varies stepwise in thickness direction of the semiconductor substrate.

5. The power semiconductor device according to claim 1 , wherein depth of the trench is substantially equal to junction depth of the fourth second-conductivity-type semiconductor layer.

6. The power semiconductor device according to claim 1 , wherein width of a portion located above the semiconductor substrate in a protruding portion of the second main electrode is larger than width of a portion buried in the trench in the protruding portion.

7. The power semiconductor device according to claim 1 , wherein the sixth second-conductivity-type semiconductor layer is formed also on a sidewall of the trench.

8. The power semiconductor device according to claim 1 , wherein insulated gate structure composed of the fourth second-conductivity-type semiconductor layer, the fifth first-conductivity-type semiconductor layer, the second first-conductivity-type semiconductor layer, the gate insulating film, and the control electrode constitutes a planar gate structure.

9. The power semiconductor device according to claim 1 , wherein a gate trench is formed in an upper surface of the semiconductor substrate, part of the gate insulating film is formed on an inner surface of the gate trench, and a lower portion of the control electrode is buried inside the gate trench.

10. The power semiconductor device according to claim 9 , wherein lower surface of the sixth second-conductivity-type semiconductor layer is located below lower surface of the control electrode.

11. The power semiconductor device according to claim 10 , wherein lower surface of a portion buried in the trench in the second main electrode is located below the lower surface of the control electrode.

12. The power semiconductor device according to claim 1 , wherein the sixth second-conductivity-type semiconductor layer is spaced from the fourth second-conductivity-type semiconductor layer, and on side face of a portion buried in the trench in the second main electrode, region between region in contact with the fourth second-conductivity-type semiconductor layer and region in contact with the sixth second-conductivity-type semiconductor layer is in contact with the second first-conductivity-type semiconductor layer.

13. The power semiconductor device according to claim 1 , further comprising a field insulating film provided on the semiconductor substrate in a termination section, and a field plate electrode in a rectangular frame configuration provided on the field insulating film.

14. The power semiconductor device according to claim 13 , wherein lower surface of outer peripheral portion of the field plate electrode is shaped like a staircase, with its lower surface ascending toward outer periphery.

15. The power semiconductor device according to claim 13 , wherein the field plate electrode is connected to one of the second major electrode and the control electrode.

16. The power semiconductor device according to claim 13 , wherein corner of the trench formed at outer side of a termination section is rounded.

17. The power semiconductor device according to claim 16 , wherein the sixth second-conductivity-type semiconductor layer formed in the termination section is formed deeper than the sixth second-conductivity-type semiconductor layer formed in a cell section.

18. The power semiconductor device according to claim 17 , wherein impurity concentration in the second first-conductivity-type semiconductor layer and the third second-conductivity-type semiconductor layer formed in the termination section is lower than impurity concentration in the second first-conductivity-type semiconductor layer and the third second-conductivity-type semiconductor layer formed in the cell section.

19. The power semiconductor device according to claim 16 , wherein the sixth second-conductivity-type semiconductor layer is formed to entirely cover side face of a portion buried in the semiconductor substrate in the second main electrode.

20. The power semiconductor device according to claim 16 , wherein a plurality of portions in the second major electrode are buried in the termination section and width of the each portion is equal to width of a portion of the second major electrode buried in a cell section.