IP Library Granted Patent US 7,611,921
Granted Patent B2
US 7,611,921 · App. 11/644,221 · Granted Nov 3, 2009

Method for manufacturing CMOS image sensor which improves sensitivity by removing a passivation membrane in a pixel region of the CMOS image sensor

Assignee: Dongbu Electronics Co., Ltd.
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Quick Facts
Patent No.
US 7,611,921
App. No.
11/644,221
Granted
Nov 3, 2009
Kind
B2
Abstract

A method for manufacturing a CMOS image sensor is disclosed. The method includes the steps of: forming a passivation oxide and a passivation nitride after forming a pad; performing a hydrogen anneal; selectively removing the passivation nitride and cleaning the passivation oxide; opening and cleaning the pad by removing the passivation oxide from the pad region; forming a pad protection membrane; forming color filter array, planarization layer and a plurality of microlenses; and removing the pad protection membrane from the pad region. A circle defect in a pixel region may be removed according to the disclosed method for manufacturing the CMOS image sensor. Accordingly, the sensitivity of the CMOS image sensor may be increased by raising the quality of the CMOS image sensor and reducing reflectance of the light.

Claims (31)

1. A method for manufacturing a CMOS image sensor, comprising:

forming a passivation oxide and a passivation nitride after forming a pad;

performing a hydrogen anneal;

selectively removing the passivation nitride directly over a pixel region of the CMOS image sensor and cleaning the passivation oxide by ashing, then cleaning with a solvent;

opening and cleaning the pad by removing the passivation oxide over the pad, wherein the step of cleaning the pad further includes the steps of ashing, solvent cleaning and secondary ashing;

forming a pad protection membrane;

forming a color filter array, a planarization layer and a plurality of microlenses; and

removing the pad protection membrane.

2. The method as recited in claim 1 , wherein the pad protection membrane comprises a plasma enhanced tetraethyl orthosilicate (PE TEOS) membrane or a thermosetting resin membrane.

3. The method as recited in claim 2 , wherein the pad protection membrane has a thickness of 200 to 600 Å.

4. The method as recited in claim 2 , wherein the pad protection membrane comprises the PE TEOS membrane, and removing the PE TEOS membrane comprises dry etching.

5. The method as recited in claim 2 , wherein the pad protection membrane comprises the thermosetting resin membrane, and removing the thermosetting resin comprises oxygen ashing.

6. The method of claim 1 , wherein the step of performing the hydrogen anneal comprises a thermal reflow using a gas mixture including hydrogen gas and nitrogen gas.

7. The method of claim 1 , wherein the step of performing the hydrogen anneal comprises a thermal reflow using a reducing gas selected from a group comprising silane and ammonia and/or a noble gas selected from a group comprising helium, neon, argon and kypton gas.

8. The method of claim 6 , wherein the step of performing the hydrogen anneal comprises a thermal reflow using a gas mixture including hydrogen and nitrogen.

9. The method of claim 6 , wherein the step of performing the hydrogen anneal comprises a thermal reflow using a reducing gas selected from a group comprising silane and ammonia and/or a noble gas selected from a group comprising helium, neon, argon and kypton.

10. The method as recited in claim 1 , wherein the color filter array, the planarization layer and the plurality of microlenses are sequentially formed on a surface of the pad protection membrane over the pixel region of the CMOS image sensor before the pad protection membrane is removed to expose the pad.

11. A method for manufacturing a CMOS image sensor, comprising:

forming a passivation oxide and a passivation nitride over a pad in the CMOS image sensor;

selectively removing the passivation nitride directly over a pixel region of the CMOS image sensor and the pad and cleaning the passivation nitride and the passivation oxide by ashing, then cleaning with a solvent;

opening the pad by removing the passivation oxide over the pad; cleaning the pad by ashing, solvent cleaning and secondary ashing;

forming a pad protection membrane over an entire surface of the CMOS image sensor;

forming a color filter array, a planarization layer and a plurality of microlenses on the CMOS image sensor; and

removing an exposed portion the pad protection membrane.

12. The method of claim 11 , further comprising performing a hydrogen anneal.

13. The method as recited in claim 11 , wherein the pad protection membrane comprises a plasma enhanced tetraethyl orthosilicate (PE TEOS) membrane or a thermosetting resin membrane.

14. The method as recited in claim 13 , wherein the pad protection membrane has a thickness of 200 to 600 Å.

15. The method as recited in claim 13 , wherein the pad protection membrane comprises the PE TEOS membrane, and removing the PE TEOS membrane comprises dry etching.

16. The method as recited in claim 13 , wherein the pad protection membrane comprises the thermosetting resin membrane, and removing the thermosetting resin comprises oxygen ashing.

17. The method as recited in claim 11 , wherein the color filter array, the planarization layer and the plurality of microlenses are sequentially formed on a surface of the pad protection membrane over the pixel region of the CMOS image sensor before the exposed portion of the pad protection membrane is removed.

18. The method as recited in claim 11 , further comprising cleaning the pad after the removal of the passivation oxide over the pad by a second ashing.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 21, 2006
From: KIM, JIN HAN
To: DONGBU ELECTRONICS CO., LTD.
Reel/Frame 018727/0478 →
Priority Claims (1)
KR 10-2005-0131435 · Dec 28, 2005 · national
Continuity (1)
Related Publication 20070148805A1 · Jun 28, 2007