IP Library › Granted Patent US 7,613,935
Granted Patent B2
US 7,613,935 · App. 11/192,735 · Granted Nov 3, 2009

Power monitoring for processor module

Assignee: Hewlett-Packard Development Company, L.P.
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,613,935
App. No.
11/192,735
Granted
Nov 3, 2009
Kind
B2
Abstract

A processor module includes an execution unit and a power monitor for monitoring power consumption by processor components including said execution unit.

Claims (25)

1. A method comprising:

a voltage regulator comprising a monitor for providing power to and monitoring power consumption by a processor;

storing timestamp data, power consumption data, and power settings associated with a processor mode in said monitor;

selecting the mode of said processor as a function of said power-consumption data; and

issuing a warning when said power-consumption data meets a warning criterion.

2. A method as recited in claim 1 wherein said mode affects the duration of an instruction cycle.

3. A method as recited in claim 1 wherein said mode affects a parallelism achieved by said processor module.

4. A method as recited in claim 1 wherein said warning is in the form of a processor interrupt.

5. A method as recited in claim 4 wherein said voltage regulator monitors said power consumption by said processor independently of other components of a host computer system.

6. A computer system comprising:

memory for storing instructions and data;

a processor module including an execution unit for manipulating said data according to said instructions; and

a voltage regulator for delivering power to said processor, said voltage regulator including a power-consumption monitor for generating time-stamp data, and storing power-consumption data representing consumption of power by said processor, said time-stamp data, and processor configuration data associated with said power-consumption data.

7. A computer system as recited in claim 6 wherein said processor module includes a clock multiplier with a programmable multiplier mode, said power-consumption monitor associating data representing a mode of said multiplier with said power-consumption data.

8. A computer system as recited in claim 6 wherein said power monitor monitors said power consumption by said processor independently of other components of a host computer system.

9. A computer system comprising:

a processor; and

a power-consumption monitor separate from said processor, said processor and said power monitor being coupled to each other so that:

said monitor can sense power consumption by said processor, and generate power-consumption data representing said power consumption and stores said power-consumption data, time-stamp data, and processor power settings associated with said power consumption data; and

said processor can read said power-consumption data from said monitor.

10. A computer system as recited in claim 9 wherein said monitor time-stamps said power-consumption data, and said processor reads time-stamped power-consumption data from said monitor.

11. A computer system as recited in claim 10 further comprising a daughterboard that mates with a host computer via a socket on a motherboard of said host computer, said processor and said monitor both mounted on said daughterboard.

12. A computer system as recited in claim 11 wherein said daughterboard includes conductors through which said processor and said monitor communicate.

13. A computer system as recited in claim 12 wherein said monitor issues a warning in the form of a processor interrupt when said power consumption data meets a warning criterion, said processor providing for writing said criterion to said monitor and reading said power-consumption data from said monitor.

14. A computer system as recited in claim 13 further comprising a voltage regulator for regulating voltages provided to said processor, said voltage regulator including said monitor.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 9, 2015
From: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
To: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Reel/Frame 037079/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 29, 2005
From: SCHUMACHER, DEREK STEVEN; MARTINEZ, IDIS RAMONA
To: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
Reel/Frame 016829/0110 →
Continuity (1)
Related Publication 20070028129A1 · Feb 1, 2007