Automatic time warp for electronic system simulation
A simulation of an electronics system which performs a set of operations of interest. A simulated supervisory circuit detects a state in which all the operations have been completed, and also determines the amount of time until the occurrence of the next relevant event. Simulation time is then advanced by that amount of time. This enables simulation time corresponding to an inactive system to be eliminated.
1. A computer-implemented method for efficiently simulating an electronic system, comprising:
using a computer to perform steps including:
determining a state of said simulated electronic system;
determining the occurrence of a next relevant system event in said simulated electronic system when said simulated electronic system state is determined to be idle;
advancing a simulation time to immediately prior to said occurrence of said next relevant system event;
calculating a state of said simulated electronic system at said advanced simulation time so that said state of said simulated electronic system is advanced; and
further advancing said simulated electronic system by single simulated clock periods until a predetermined wait time has elapsed regardless of whether the simulated electronic system state is idle
whereby actual time for simulating said electronic system by said computer is reduced.
2. The method of claim 1 further comprising repeating said determining, next relevant system event determining, simulation time advancing, and electronic system state calculating steps.
3. The method of claim 1 wherein said determining step comprises inspecting a predefinable subset of said simulated electronic system.
4. The method of claim 1 further comprising determining next relevant events in said electronic system.
5. The method of claim 1 wherein said further advancing said simulated electronic system by single simulated clock periods step comprises advancing said simulation time of said simulated electronic system by a simulation clock period and calculating said electronic system state at said advanced single simulated clock period.
6. The method of claim 1 wherein said advancing said simulation time step comprises advancing said simulation time by a simulation clock period and calculating said electronic system state at said advanced simulation time when said simulated electronic system is not in an idle state.
7. The method of claim 1 wherein said advancing step comprises advancing a simulation clock and calculating said electronic system state at said advanced simulation clock time when said simulated electronic system is not in an idle state.
8. The method of claim 1 wherein said next relevant system event determining step comprises determining the occurrence of each event on an events list.
9. A computer readable storage medium on which are recorded executable computer code which when executed cause a processor to perform the steps comprising:
determining a state of a simulated electronic system;
determining the occurrence of a next relevant system event in said simulated electronic system when said simulated electronic system is determined to be idle;
advancing a simulation time immediately prior to said occurrence of said next relevant system event;
calculating a state of said simulated electronic system at said advanced simulation time so that said state of said simulated electronic system is advanced whereby actual time for simulating said electronic system is reduced; and
further advancing said simulated electronic system by single simulated clock periods until a predetermined wait time has elapsed regardless of whether the simulated electronic system state is idle;
whereby actual time for simulating said electronic system is reduced.
10. The computer readable storage medium of claim 9 further comprising repeating said determining, next relevant system event determining, simulation time advancing, and electronic system state calculating code operations.
11. The computer readable storage medium of claim 9 wherein said determining step comprises inspecting a predefinable subset of said simulated electronic system.
12. The computer readable storage medium of claim 9 further comprising determining next relevant events in said electronic system.
13. The computer readable storage medium of claim 9 wherein said further advancing said simulated electronic system by single simulated clock period steps comprises advancing said simulation time of said simulated electronic system by a simulation clock period and calculating said electronic system state at said advanced single simulated clock period.
14. The computer readable storage medium of claim 9 wherein said advancing simulation time step comprises advancing said simulation time by a simulation clock period and calculating said electronic system state at said advanced simulation time when said simulated electronic system is not in an idle state.
15. The computer readable storage medium of claim 9 wherein said advancing simulation time step comprises advancing a simulation clock and calculating said electronic system state at said advanced simulation clock time when said simulated electronic system is not in an idle state.
16. The computer readable storage medium of claim 9 wherein said next relevant system event determining step comprises determining the occurrence of each event on an events list.