Method and system for a fractional-N synthesizer for a mobile digital cellular television environment

1. A method for generating timing signals, the method comprising:

determining a division number at a time instant within a division cycle;

modifying a local oscillator signal based on said division number in a succeeding division cycle;

generating a subsequent local oscillator signal based on said modifying;

determining said division number based on a plurality of scale factors associated with a corresponding plurality of stages; and

selecting a numerical value for each of said plurality of scale factors based on a corresponding portion of bits in a binary representation of a generated division number.

2. The method according to claim 1 , comprising selecting said numerical value for at least a portion of said plurality of scale factors based on a corresponding stage control signal.

3. The method according to claim 1 , comprising

generating a plurality of said local oscillator signals.

4. The method according to claim 3 , comprising selecting one of said generated plurality of said local oscillator signals based on a channel frequency.

5. The method according to claim 4 , comprising modifying said selected one of said generated plurality of said local oscillator signals based on a frequency scaling factor.

6. The method according to claim 5 , comprising selecting a numerical value for said frequency scaling factor based on a scale control signal.

7. The method according to claim 6 , wherein a value associated with said scale control signal is based on said channel frequency.

8. The method according to claim 5 , wherein said modification comprises generating a plurality of phase shifted version of said modified said selected one of said generated plurality of said local oscillator signals.

9. A system for generating timing signals, the system comprising:

one or more circuits that are operable to determine a division number at a time instant within a division cycle;

said one or more circuits are operable to modify a local oscillator signal based on said division number in a succeeding division cycle;

said one or more circuits are operable to generate a subsequent local oscillator signal based on said modifying;

said one or more circuits are operable to determine said division number based on a plurality of scale factors associated with a corresponding plurality of stages; and

said one or more circuits are operable to select a numerical value for each of said plurality of scale factors based on a corresponding portion of bits in a binary representation of a generated division number.

10. The system according to claim 9 , wherein said one or more circuits are operable to select said numerical value for at least a portion of said plurality of scale factors based on a corresponding stage control signal.

11. The system according to claim 9 ,

wherein said one or more circuits are operable to generate a plurality of said local oscillator signals.

12. The system according to claim 11 , wherein said one or more circuits are operable to select one of said generated plurality of said local oscillator signals based on a channel frequency.

13. The system according to claim 12 , wherein said one or more circuits are operable to modify said selected one of said generated plurality of said local oscillator signals based on a frequency scaling factor.

14. The system according to claim 13 , wherein said one or more circuits are operable to select a numerical value for said frequency scaling factor based on a scale control signal.

15. The system according to claim 14 , wherein a value associated with said scale control signal is based on said channel frequency.

16. The system according to claim 13 , wherein said modification comprises generating a plurality of phase shifted version of said modified said selected one of said generated plurality of said local oscillator signals.

17. A method for generating timing signals, the method comprising:

determining a division number at a time instant within a division cycle;

modifying a local oscillator signal based on said division number in a succeeding division cycle;

generating a subsequent local oscillator signal based on said modifying;

generating a plurality of said local oscillator signals;

selecting one of said generated plurality of said local oscillator signals based on a channel frequency; and

modifying said selected one of said generated plurality of said local oscillator signals based on a frequency scaling factor, wherein said modification comprises generating a plurality of phase shifted version of said modified said selected one of said generated plurality of said local oscillator signals.

18. A system for generating timing signals, the system comprising:

one or more circuits that are operable to determine a division number at a time instant within a division cycle;

said one or more circuits are operable to modify a local oscillator signal based on said division number in a succeeding division cycle;

said one or more circuits are operable to generate a subsequent local oscillator signal based on said modifying;

said one or more circuits are operable to generate a plurality of said local oscillator signals;

said one or more circuits are operable to select one of said generated plurality of said local oscillator signals based on a channel frequency; and

said one or more circuits are operable to modify said selected one of said generated plurality of said local oscillator signals based on a frequency scaling factor, wherein said modification comprises generating a plurality of phase shifted version of said modified said selected one of said generated plurality of said local oscillator signals.