IP Library › Granted Patent US 7,638,782
Granted Patent B2
US 7,638,782 · App. 11/204,050 · Granted Dec 29, 2009

Semiconductor device manufacturing method and ion implanter used therein

Assignee: Panasonic Corporation
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Quick Facts
Patent No.
US 7,638,782
App. No.
11/204,050
Granted
Dec 29, 2009
Kind
B2
Abstract

Impurity ions are implanted into a semiconductor wafer of which a capacitor insulting film is formed on a principal face. In this impurity ion implantation step, the impurity ions are implanted into the semiconductor wafer in the form of a pulsed beam that repeats ON-OFF operation intermittently.

Claims (35)

1. A semiconductor device manufacturing method comprising the steps of:

(a) forming an insulating film on a semiconductor region; and

(b) implanting an impurity ion into the semiconductor region on which the insulating film is formed,

wherein in the step (b), the impurity ion is implanted into the semiconductor region in a form of a pulsed ion beam for intermittent irradiation,

the semiconductor region is a semiconductor substrate or a semiconductor layer formed on a semiconductor substrate,

in the step (b), the ion beam scans the semiconductor substrate in a first direction within a substrate surface thereof while the semiconductor substrate is scanned in a second direction intersecting with the first direction within the substrate surface thereof, and

in the step (b), the ion beam is implanted so that a pulse width t [s] of the intermittent pulsed beam fulfills:

t [s]≦(a capacitance per unit area [F/cm 2 ] of the insulating film×2d [cm]×10 7 [V/cm])/(an average current density [A/cm 2 ] of the ion beam),

wherein d[cm] is a film thickness of the insulating film.

2. The semiconductor device manufacturing method of claim 1 , wherein the insulating film is a capacitor insulating film.

3. The semiconductor device manufacturing method of claim 1 , wherein the insulating film is a gate insulating film.

4. The semiconductor device manufacturing method of claim 1 , wherein in the step (b), the ion beam scans electrostatically or electromagnetically.

5. The semiconductor device manufacturing method of claim 1 ,

wherein in the stop (b), the ion beam scans the semiconductor substrate two-dimensionally and electrostatically or electromagnetically within a substrate surface thereof.

6. The semiconductor device manufacturing method of claim 1 ,

wherein the step (b) includes a step of supplying, from an electron flood gun onto the semiconductor region, electrons for preventing the semiconductor region from being positively electrified by implantation of the ion beam, and

an energy E [eV] of electrons from the electron flood gun is equal to or smaller than 2d [cm]×10 7 [eV/cm] (E≦2d [cm]×10 7 [eV/cm]).

7. The semiconductor device manufacturing method of claim 1 , wherein a duty ratio of a pulse of the pulsed ion beam is higher than 0 and equal to or lower than 50%.

8. The semiconductor device manufacturing method comprising the steps of:

(a) forming an insulating film on a semiconductor region; and

(b) implanting an impurity ion into the semiconductor region on which the insulating film is formed,

wherein in the step (b), the impurity ion is implanted into the semiconductor region in a form of a pulsed ion beam for intermittent irradiation,

the semiconductor region is a semiconductor substrate or a semiconductor layer formed on a semiconductor substrate,

in the step (b), the semiconductor substrate is two-dimensionally scanned within a substrate plane thereof of is scanned while rotating within the plane thereof with the ion beam fixed, and

in the step (b), the ion beam is implanted so that a pulse width t [s] of the intermittent pulsed beam fulfills:

t [s]≦(a capacitance per unit area [F/cm 2 ] of the insulating film×2d [cm]×10 7 [V/cm])/(an average current density [A/cm 2 ] of the ion beam),

wherein d [cm] is a film thickness of the insulating film.

9. The semiconductor device manufacturing method of claim 8 , wherein the insulating film is a capacitor insulating film.

10. The semiconductor device manufacturing method of claim 8 , wherein the insulating film is a gate insulating film.

11. The semiconductor device manufacturing method of claim 8 , wherein in the step (b), the ion beam scans electrostatically or electromagnetically.

12. The semiconductor device manufacturing method of claim 8 , wherein in the step (b), the ion beam scans the semiconductor substrate two-dimensionally and electrostatically or electromagnetically within a substrate surface thereof.

13. The semiconductor device manufacturing method of claim 8 ,

wherein the step (b) includes a step of supplying, from an electron flood gun onto the semiconductor region, electrons for preventing the semiconductor region from being positively electrified by implantation of the ion beam, and

an energy E [eV] of the electrons from the electron flood gun is equal to or smaller than 2d [cm]×10 7 [eV/cm] (E≦2d [cm]×10 7 [eV/cm].

14. The semiconductor device manufacturing method of claim 8 , wherein a duty ratio of a pulse of the pulsed ion beam is higher than 0 and equal to or lower than 50%.

Assignments (2)
CHANGE OF NAME Recorded Nov 24, 2008
From: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
To: PANASONIC CORPORATION
Reel/Frame 021897/0671 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 11, 2005
From: YONEDA, KENJI; NIWAYAMA, MASAHIKO
To: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
Reel/Frame 016768/0236 →
Priority Claims (1)
JP 2005-017327 · Jan 25, 2005 · national
Continuity (1)
Related Publication 20060163498A1 · Jul 27, 2006