Multi-state latches from n-state reversible inverters
N-valued re-circulating latches using n-valued reversible inverters with n>3 are disclosed. Latches using n-valued self-reversing inverters are provided; latches using n-valued universal inverters are provided; and latches using inverters which are not self-reversing or universal are also provided. A latch may use two individually controlled gates. It may also use one individually controlled gate. N-valued latches are provided wherein a state is represented by a signal being an independent instance of a physical phenomenon. A latch not using absence-of-signal as a state is also provided.
1. An n-state re-circulating latch for storing an n-state symbol with n>3, comprising:
an input enabled to receive a signal representing one of n states;
an output enabled to provide a signal representing one of n states;
a forward path between the input and the output and a feedback path different from the forward path between the output and the input, the forward path and feedback path being part of a loop; and
at least two reversible n-state inverters in the loop.
2. The n-state re-circulating latch as claimed in claim 1 , further comprising:
the at least two reversible n-state inverters in the loop establishing an identity inverter.
3. The n-state re-circulating latch as claimed in claim 1 , further comprising:
a first individually controlled n-state gate having an input enabled to receive a signal having one of n states, a control input enabled to receive a signal that can be in a first state or not a first state, and an output being connected to the input of the re-circulating latch enabled to provide a signal that represents the one of n states of the signal at the input of the gate; and
a second individually controlled n-state gate being in the feedback path, having an input enabled to receive a signal having one of n states, a control input enabled to receive a signal that can be in a second state or not a second state, and an output enabled to provide a signal that represents the one of n states of the signal at the input of the gate.
4. The n-state re-circulating latch as claimed in claim 1 , wherein n=2 p with p>2.
5. The n-state re-circulating latch as claimed in claim 1 , wherein an n-valued signal is an independent instance of a physical phenomenon.
6. The n-state re-circulating latch as claimed in claim 4 , wherein the phenomenon is light and an independent instance is determined by a wavelength.
7. The n-state re-circulating latch as claimed in claim 1 , wherein an n-state reversible inverter is a self-reversing inverter.
8. The n-state re-circulating latch as claimed in claim 1 , wherein an n-state reversible inverter is a universal inverter.
9. The n-state re-circulating latch as claimed in claim 1 , further comprising at least 3 n-state reversible inverters.
10. The n-state re-circulating latch as claimed in claim 1 , wherein not all inverters are standard n-state inverters.
11. The n-state re-circulating latch as claimed in claim 2 , wherein the control inputs of the first and the second individually controlled gates receive the same signal.
12. An n-state latch for storing a signal representing one of n states with n≧2, comprising:
a circuit having an input enabled to receive a signal representing one of n states and an output enabled to provide a signal representing one of n states, the circuit having a loop including a forward path between the input and the output and a feedback path between the output and the input;
at least two n-state reversible inverters being contained in the loop; and
a signal at the input being an independent instance of a physical phenomenon, the signal representing one of n states.
13. The n-state latch as claimed in claim 12 , wherein absence of signal does not represent a state.
14. The n-state latch as claimed in claim 12 , wherein n>2.
15. The n-state latch as claimed in claim 12 , wherein at least one n-state reversible inverter is not a standard n-state inverter.
16. The n-state latch as claimed in claim 12 , wherein the latch is part of a device that processes digital symbols.
17. A latch for storing an n-state symbol having one of n states with n>2, comprising:
an input enabled to receive a signal being an independent instance of a physical phenomenon and representing one of n states;
an output enabled to provide a signal being an independent instance of a physical phenomenon and representing one of n states;
at least two n-state reversible inverters;
the latch being in a first condition when the input is provided with a signal not being absence of state or absence of signal and representing one of n states and the output providing a signal representing the state of the signal at the input; and
the latch being in a second condition when the input is provided with a signal being absence of state or absence of signal and the output providing a signal equivalent to the signal of the output when the latch was in the first condition.
18. The latch for storing an n-state symbol as claimed in claim 17 , further comprising:
the at least two n-state inverters establishing identity.
19. The latch for storing an n-state symbol as claimed in claim 17 , wherein the latch is part of a computing device.
20. The latch for storing an n-state symbol as claimed in claim 17 , wherein the latch is part of a communication system.