IP Library › Granted Patent US 7,659,590
Granted Patent B2
US 7,659,590 · App. 11/091,300 · Granted Feb 9, 2010

DNA-based memory device and method of reading and writing same

Assignee: Clemson University
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Quick Facts
Patent No.
US 7,659,590
App. No.
11/091,300
Granted
Feb 9, 2010
Kind
B2
Abstract

The present invention is directed to a memory device having very high storage density capability. In general, the memory device includes an array of individual memory cells which store information that is assigned a value based on the molecular contents of the memory cell. In a preferred embodiment, the molecules utilized for storing information in the memory cells may be single-strand polynucleotides, for instance single-strand oligonucleotides of between about 5 and about 20 monomer units. The present invention is also directed to methods and systems useful for writing and reading the molecular-based memory devices. In particular, the devices may be written and read via modified atomic force microscopy processes.

Claims (34)

1. A computer system, comprising:

a memory device for storing instructions and data, said memory device comprising a substrate having a surface thereof defining a plurality of memory cells, each memory cell being located at a different memory cell address on the substrate surface, each memory cell comprising an anchoring compound attached to the surface of the corresponding memory cell address, each memory cell having an assigned value based upon the molecular contents of that memory cell, wherein at least a portion of the memory cells further comprise a linking compound attached to the anchoring compound and a polynucleotide attached to the linking compound, wherein the polynucleotides held in adjacent memory cells can be the same or different, the different polynucleotides are oligonucleotides and are selected from the group consisting of oligo-A oligomers, oligo-T oligomers, oligo-C oligomers, and oligo-G oligomers;

a processor configured to selectively access the instructions and data stored in said memory device and either manipulate data or execute instructions obtained therefrom; and

an interface between said memory device and said processor for enabling the transfer of information between said memory device and said processor, said interface being configured to attach a polynucleotide to the surface of said substrate at the memory cell address, the polynucleotide including a number of monomer nucleotide units, each monomer being one of a set of nucleotides; wherein

said memory cell value is one of up to y x +1 different bits of information where x is the number of monomer nucleotides on the polynucleotide, and y is the number of different nucleotides in the set of nucleotides.

2. A computer system as in claim 1 , wherein said interface comprises an atomic force microscope arm.

3. A computer system as in claim 1 , wherein said interface further comprises a plurality of control circuits and a communications bus between said memory device and said processor.

4. A computer system as in claim 1 , wherein said interface comprises an array of atomic force microscope arms.

5. A computer system as in claim 4 , wherein said interface further comprises a plurality of control circuits and a communications bus between said memory device and said processor.

6. A computer system as in claim 1 , further comprising at least one input/output (I/O) device coupled to said memory device and to said processor.

7. A computer system as in claim 1 , wherein each memory cell is at a distance of less than about 500 nm from any adjacent memory cell.

8. A computer system, comprising:

a memory device for storing instructions and data, said memory device comprising a substrate having a surface thereof defining a plurality of memory cells, each memory cell being located at a different memory cell address on the substrate surface, each memory cell comprising an anchoring compound attached to the surface of the corresponding memory cell address, each memory cell having an assigned value based upon the molecular contents of that memory cell, wherein at least a portion of the memo cells further comprise a linking compound attached to the anchoring compound and a polynucleotide attached to the linking compound, wherein the polynucleotides held in adjacent memory cells can be the same or different, the different polynucleotides are oligonucleotides and are selected from the group consisting of oligo-A oligomers, oligo-T oligomers, oligo-C oligomers, and oligo-G oligomers;

a processor configured to selectively access the instructions and data stored in said memory device and either manipulate data or execute instructions obtained therefrom; and

an interface between said memory device and said processor for enabling the transfer of information between said memory device and said processor, said interface being configured to identify a polynucleotide immobilized on the surface of said substrate at the memory cell address, the polynucleotide including a number of monomer nucleotide units, each monomer being one of a set of nucleotides; wherein

said memory cell value is one of up to y x +1 different bits of information where x is the number of monomer nucleotides on the polynucleotide, and y is the number of different nucleotides in the set of nucleotides.

9. A computer system as in claim 8 , wherein said interface comprises an atomic force microscope arm.

10. A computer system as in claim 8 , wherein said interface further comprises a plurality of control circuits and a communications bus between said memory device and said processor.

11. A computer system as in claim 8 , wherein said interface comprises an array of atomic force microscope arms.

12. A computer system as in claim 11 , wherein said interface further comprises a plurality of control circuits and a communications bus between said memory device and said processor.

13. A computer system as in claim 8 , further comprising at least one input/output (I/O) device coupled to said memory device and to said processor.

14. A computer system as in claim 8 , wherein each memory cell is at a distance of less than about 500 nm from any adjacent memory cell.

15. A computer system, comprising:

a memory device for storing instructions and data, said memory device comprising a substrate having a surface thereof defining a plurality of memory cells, each memory cell being located at a different memory cell address on the substrate surface, each memory cell comprising an anchoring compound attached to the surface of the corresponding memory cell address, at least a portion of the memory cells further comprises a linking compound attached to the anchoring compound and a polynucleotide attached to the linking compound, wherein the polynucleotides held in adjacent memory cells can be the same or different, and the different polynucleotides are oligonucleotides and are selected from the group consisting of oligo-A oligomers, oligo-T oligomers, oligo-C oligomers, and oligo-G oligomers;

a processor configured to selectively access the instructions and data stored in said memory device and either manipulate data or execute instructions obtained therefrom; and

an interface between said memory device and said processor for enabling the transfer of information between said memory device and said processor.

16. A computer system as in claim 15 , wherein said interface comprises an atomic force microscope arm.

17. A computer system as in claim 15 , wherein said interface further comprises a plurality of control circuits and a communications bus between said memory device and said processor.

18. A computer system as in claim 15 , wherein said interface is configured to attach polynucleotides to the surface of said substrate.

19. A computer system as in claim 15 , wherein said interface is configured to identify polynucleotides immobilized on the surface of said substrate.

20. A computer system as in claim 15 , wherein said interface comprises an array of atomic force microscope arms.

21. A computer system as in claim 20 , wherein said interface further comprises a plurality of control circuits and a communications bus between said memory device and said processor.

22. A computer system as in claim 15 , further comprising at least one input/output (I/O) device coupled to said memory device and to said processor.

23. A computer system as in claim 15 , wherein each memory cell is at a distance of less than about 500 nm from any adjacent memory cell.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 15, 2010
From: CLEMSON UNIVERSITY
To: CLEMSON UNIVERSITY RESEARCH FOUNDATION
Reel/Frame 024537/0144 →
Continuity (2)
Division 1042769100 · May 1, 2003
Related Publication 20050243618A1 · Nov 3, 2005