IP Library › Granted Patent US 7,671,777
Granted Patent B2
US 7,671,777 · App. 11/822,589 · Granted Mar 2, 2010

AD converter

Assignee: Panasonic Corporation
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Quick Facts
Patent No.
US 7,671,777
App. No.
11/822,589
Granted
Mar 2, 2010
Kind
B2
Abstract

An AD converter includes an analog data storing unit, a first DA converter for converting an input digital data into a first analog reference voltage which varies within a first voltage range in a range of every possible signal voltage of the input analog data, a second DA converter for converting the input digital data into a second analog reference voltage which varies within a second voltage range in the range of every possible signal voltage of the input analog data, a first comparator for comparing the input analog data with the first reference voltage, a second comparator for comparing the input analog data with the second reference voltage and a digital data storing unit for storing a digital data corresponding to a point of time when a change of state occurs in the comparison results of each of the first and second comparators.

Claims (55)

1. An AD converter comprising:

an analog data storing unit for storing an input analog data;

a first DA converter for converting an input digital data into a first analog reference voltage which varies within a first voltage range in a range of every possible signal voltage of the input analog data;

a second DA converter for converting the input digital data into a second analog reference voltage which varies within a second voltage range in the range of every possible signal voltage of the input analog data;

a first comparator for comparing the input analog data from the analog data storing unit with the first reference voltage;

a second comparator for comparing the input analog data from the analog data storing unit with the second reference voltage; and

a digital data storing unit for storing a digital data corresponding to a point of time when a change of state occurs in the comparison results of each of the first and second comparators, wherein:

the first voltage range and the second voltage range have an overlapping range between them, and

the AD converter further comprises a correction circuit for correcting the value of the digital data stored in the digital data storing unit when the input analog data exists in the overlapping range.

2. The AD converter of claim 1 , wherein the first voltage range and the second voltage range are summed to constitute the range of every possible signal voltage of the input analog data.

3. The AD converter of claim 2 , wherein the first voltage range and the second voltage range are equal in size.

4. The AD converter of claim 3 , wherein

the first voltage range is a range covering from the minimum value to the intermediate value in the range of every possible signal voltage of the input analog data and

the second voltage range is a range covering from the intermediate value to the maximum value in the range of every possible signal voltage of the input analog data.

5. The AD converter of claim 4 , wherein

the first reference voltage is a voltage which increases with time from the minimum value to the intermediate value in the range of every possible signal voltage of the input analog data and

the second reference voltage is a voltage which decreases with time from the maximum value to the intermediate value in the range of every possible signal voltage of the input analog data.

6. The AD converter of claim 4 , wherein

the first reference voltage is a voltage which increases with time from the intermediate value to the maximum value in the range of every possible signal voltage of the input analog data and

the second reference voltage is a voltage which decreases with time from the intermediate value to the minimum value in the range of every possible signal voltage of the input analog data.

7. The AD converter of claim 4 , wherein

the first reference voltage is a voltage which increases with time from the intermediate value to the maximum value in the range of every possible signal voltage of the input analog data and

the second reference voltage is a voltage which increases with time from the minimum value to the intermediate value in the range of every possible signal voltage of the input analog data.

8. The AD converter of claim 4 , wherein

the first reference voltage is a voltage which decreases with time from the maximum value to the intermediate value in the range of every possible signal voltage of the input analog data and

the second reference voltage is a voltage which decreases with time from the intermediate value to the minimum value in the range of every possible signal voltage of the input analog data.

9. The AD converter of claim 1 , wherein the first voltage range and the second voltage range are different in size.

10. The AD converter of claim 1 , wherein the rate of change of the first reference voltage with respect to the input digital data is different from the rate of change of the second reference voltage with respect to the input digital data.

11. The AD converter of claim 1 , wherein the range of every possible value of the input digital data to be input to the first DA converter is different from the range of every possible value of the input digital data to be input to the second DA converter.

12. The AD converter of claim 1 , wherein the time taken for the first reference voltage to vary within the first voltage range is equal to the time taken for the second reference voltage to vary within the second voltage range.

13. The AD converter of claim 1 , wherein at least one of the first and second DA converters does not have a linear output property.

14. An AD converter comprising:

a first analog data storing unit for storing an input analog data from a dark pixel;

a second analog data storing unit for storing an input analog data from a light-exposed pixel;

a DA converter for converting an input digital data into an analog reference voltage;

a first comparator for comparing the input analog data from the dark pixel delivered from the first analog data storing unit with the reference voltage;

a second comparator for comparing the input analog data from the light-exposed pixel delivered from the second analog data storing unit with the reference voltage; and

a digital data storing unit for storing a digital data corresponding to a point of time when a change of state occurs in the comparison results each of the first and second comparators.

15. An AD converter comprising:

a first analog data storing unit for storing an input analog data from a dark pixel;

a second analog data storing unit for storing an input analog data from a light-exposed pixel;

a first DA converter for converting an input digital data into a first analog reference voltage which varies within a range covering from the minimum value to the intermediate value in a range of every possible signal voltage of the input analog data from the light-exposed pixel;

a second DA converter for converting the input digital data into a second analog reference voltage which varies within a range covering from the intermediate value to the maximum value in the range of every possible signal voltage of the input analog data from the light-exposed pixel;

a first comparator for comparing the input analog data from the dark pixel delivered from the first analog data storing unit with the first reference voltage;

a second comparator for comparing the input analog data from the light-exposed pixel delivered from the second analog data storing unit with the first reference voltage;

a third comparator for comparing the input analog data from the light-exposed pixel delivered from the second analog data storing unit with the second reference voltage; and

a digital data storing unit for storing a digital data corresponding to a point of time when a change of state occurs in the comparison results of each of the first, second and third comparators.

16. An AD converter comprising:

a first analog data storing unit for storing an input analog data;

a subtraction circuit for subtracting the intermediate value in a range of every possible signal voltage of the input analog data from the input analog data;

a second analog data storing unit for storing the input analog data from the subtraction circuit after the subtraction;

a DA converter for converting an input digital data into an analog reference voltage which varies in a range covering from the minimum value to the intermediate value in the range of every possible signal voltage of the input analog data;

a first comparator for comparing the input analog data from the first analog data storing unit with the reference voltage;

a second comparator for comparing the input analog data after the subtraction from the second analog data storing unit with the reference voltage; and

a digital data storing unit for storing a digital data corresponding to a point of time when a change of state occurs in the comparison results of each of the first and second comparators.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 3, 2014
From: PANASONIC CORPORATION (FORMERLY MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.)
To: GODO KAISHA IP BRIDGE 1
Reel/Frame 032152/0514 →
CHANGE OF NAME Recorded Nov 21, 2008
From: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
To: PANASONIC CORPORATION
Reel/Frame 021897/0606 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 9, 2007
From: YAMADA, TAKAYOSHI; YAMAGUCHI, TAKUMI; KASUGA, SHIGETAKA; MURATA, TAKAHIKO
To: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
Reel/Frame 020090/0690 →
Priority Claims (2)
JP 2006-190013 · Jul 11, 2006 · national
JP 2007-146827 · Jun 1, 2007 · national
Continuity (1)
Related Publication 20080018517A1 · Jan 24, 2008