IP Library Granted Patent US 7,684,165
Granted Patent B2
US 7,684,165 · App. 11/562,364 · Granted Mar 23, 2010

Circuit element and method for protecting a load circuit

Assignee: Fraunhofer-Gesellschaft zur Foerderung der Angewandten Forschung E.V.
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Quick Facts
Patent No.
US 7,684,165
App. No.
11/562,364
Granted
Mar 23, 2010
Kind
B2
Abstract

A circuit element for protecting a load circuit includes a signal input for applying a signal, a signal output, a signal path connecting the signal input to the signal output, and an interruption means for irreversibly interrupting the signal path upon the reception of a control signal at the same.

Claims (21)

1. A circuit element for protecting a load circuit, comprising:

a signal input for applying a signal;

a signal output;

a signal path connecting the signal input to the signal output and leading via a trace arranged on a main surface of a semiconductor substrate and bordering on a first heat-dissipating region and a second heat-dissipating region,

wherein the second heat-dissipating region includes a trench region in the semiconductor substrate, which is formed such that the trace is meltable over the trench region by local heating above the trench region by the poor heat dissipation thereof, and

wherein the trench region defines a cavity below the trace, the dimension of which in a direction perpendicular to the main surface of the semiconductor substrate, on which the trace is arranged, is greater than its dimension in a direction of the extension of the trace, so that the cavity acts as a capillary for sucking off the molten trace material; and

an interrupter for irreversibly interrupting the signal path upon the reception of a control signal at the same.

2. The circuit element for protecting a load circuit of claim 1 , wherein the interrupter comprises a monitoring circuit for detecting a fault state on the basis of a current through the signal path and for generating the control signal based on the detected fault state, and an electric trigger mechanism, which causes, upon the reception of the control signal, a current through the signal path by which the signal path is irreversibly interrupted.

3. The circuit element for protecting a load circuit of claim 1 , wherein the monitoring circuit comprises a voltage divider circuit.

4. The circuit element for protecting a load circuit of claim 3 , wherein a signal input into the voltage divider circuit is dependent on a signal at the signal output of the circuit element.

5. The circuit element for protecting a load circuit of claim 1 , wherein the monitoring circuit comprises a temperature sensor.

6. The circuit element for protecting a load circuit of claim 1 , wherein the monitoring circuit comprises a current measurement circuit determining the current across the signal path.

7. The circuit element for protecting a load circuit of claim 1 , wherein the interrupter includes a field-effect transistor, a bipolar transistor, a thyristor, a varistor, or an IGBT structure.

8. The circuit element for protecting a load circuit of claim 1 , wherein the trace in an interruption region in the proximity of second heat dissipation region is formed so that it heats up by itself until the signal path is interrupted by the self-destruction of the trace arising as a result of the heating.

9. A chip including a circuit element for protecting a load circuit, comprising:

a signal input for applying a signal;

a signal output;

a signal path connecting the signal input to the signal output and leading via a trace arranged on a main surface of a semiconductor substrate and bordering on a first heat-dissipating region and a second heat-dissipating region,

wherein the second heat-dissipating region includes a trench region in the semiconductor substrate, which is formed such that the trace is meltable over the trench region by local heating above the trench region by the poor heat dissipation thereof, and

wherein the trench region defines a cavity below the trace, the dimension of which in a direction perpendicular to the main surface of the semiconductor substrate, on which the trace is arranged, is greater than its dimension in a direction of the extension of the trace, so that the cavity acts as a capillary for sucking off the molten trace material; and

an interrupter for irreversibly interrupting the signal path upon the reception of a control signal at the same.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 7, 2007
From: BERBERICH, SVEN; MAERZ, MARTIN
To: FRAUNHOFER-GESELLSCHAFT ZUR FOERDERUNG DER ANGEWANDTEN FORSCHUNG E.V.
Reel/Frame 018975/0683 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 2, 2007
From: BERERICH, SVEN; MAERZ, MARTIN
To: FRAUNHOFER-GESELLSCHAFT ZUR FOERDERUNG DER ANGEWANDTEN FORSCHUNG E.V.
Reel/Frame 018699/0757 →
Priority Claims (1)
DE 10 2004 025 420 · May 24, 2004 · national
Continuity (2)
Continuation PCTEP200500536000 · May 17, 2005
Related Publication 20070159745A1 · Jul 12, 2007