Storage nodes, phase change memory devices, and methods of manufacturing the same

1. A storage node, comprising:

a bottom electrode contact layer filling a via hole;

a phase change layer electrically connected to the bottom electrode contact layer; and

a top electrode layer electrically connected to the phase change layer;

wherein a first portion of the bottom electrode contact layer protrudes toward the phase change layer.

2. The storage node of claim 1 , wherein the first portion of the bottom electrode contact layer extends at least partially around a second portion of the bottom electrode contact layer.

3. A phase change memory device, comprising:

a switching device; and

the storage node of claim 1 ;

wherein the switching device is electrically connected to the bottom electrode contact layer.

4. The device of claim 3 , further comprising:

an insulating layer disposed between the switching device and the phase change layer;

wherein the insulating layer includes a via hole.

5. The device of claim 4 , wherein the bottom electrode contact layer at least partially fills the via hole.

6. The device of claim 4 , wherein the bottom electrode contact layer fills the via hole.

7. The device of claim 4 , wherein the first portion of the bottom electrode contact layer extends at least partially around the via hole.

8. The device of claim 3 , wherein the switching device includes a transistor.

9. The device of claim 3 , wherein the switching device includes a diode.

10. A method of manufacturing a storage node, the method comprising:

forming a via hole in an insulating interlayer;

at least partially filling the via hole to form a bottom electrode contact layer;

protruding a first portion of the bottom electrode contact layer from the via hole; and

forming a phase change layer that covers the first portion of the bottom electrode contact layer;

wherein the phase change layer is electrically connected to the bottom electrode contact layer.

11. The method of claim 10 , further comprising:

forming a top electrode layer;

wherein the top electrode layer is electrically connected to the phase change layer.

12. The method of claim 11 , wherein the storage node comprises:

the bottom electrode contact layer;

the phase change layer; and

the top electrode layer.

13. The method of claim 10 , wherein the protruding of the first portion of the bottom electrode contact layer includes etching an upper surface of the insulating interlayer at an etching rate higher than that of the bottom electrode contact layer.

14. The method of claim 13 , wherein the etching is performed using a dry-etching method, a wet-etching method, or a dry-etching method and a wet-etching method.

15. The method of claim 10 , wherein protruding the first portion of the bottom electrode contact layer includes selectively growing the bottom electrode contact layer from the via hole.

16. The method of claim 15 , wherein selectively growing the bottom electrode contact layer includes growing the bottom electrode contact layer differently in a vertical direction and in a horizontal direction.

17. The method of claim 15 , wherein selectively growing the bottom electrode contact layer includes growing the bottom electrode contact layer at different rates in a vertical direction and in a horizontal direction.

18. The method of claim 17 , wherein growing the bottom electrode contact layer at different rates includes growing the bottom electrode contact layer in the horizontal direction at a higher rate than in the vertical direction.

19. The method of claim 17 , wherein growing the bottom electrode contact layer at different rates includes etching an upper surface of the insulating interlayer at an etching rate higher than that of the bottom electrode contact layer.

20. The method of claim 19 , wherein the etching is performed using a dry-etching method, a wet-etching method, or a dry-etching method and a wet-etching method.

21. The method of claim 10 , wherein at least partially filling the via hole comprises forming the bottom electrode contact layer on the insulating interlayer to at least partially fill the via hole, and

wherein protruding the first portion of the bottom electrode contact layer includes:

planarizing the bottom electrode contact layer formed on the insulating interlayer to a thickness;

forming a mask that covers part of the planarized bottom electrode contact layer;

removing the planarized bottom electrode contact layer not covered by the mask; and

removing the mask.

22. The method of claim 21 , further comprising:

etching an upper surface of the insulating interlayer at an etching rate higher than that of the bottom electrode contact layer.

23. The method of claim 22 , wherein the etching is performed using a dry-etching method, a wet-etching method, or a dry-etching method and a wet-etching method.

24. A method of manufacturing a phase change memory device, the method comprising:

forming a switching device on a substrate; and

manufacturing the storage node of claim 10 ;

wherein the switching device is electrically connected to the bottom electrode contact layer.

25. The method of claim 24 , further comprising:

forming a top electrode layer;

wherein the top electrode layer is electrically connected to the phase change layer.

26. The method of claim 25 , wherein the storage node comprises:

the bottom electrode contact layer;

the phase change layer; and

the top electrode layer.