Electronic circuit package
An electronic apparatus which includes a wiring substrate which includes wiring conductors, and a plurality of semiconductor bare chips that are formed on the wiring substrate. The semiconductor bare chips include a processor for processing data and a circuit having a checking function for detecting faults of the processor.
1. An electronic apparatus comprising:
a wiring substrate which includes wiring conductors;
a first semiconductor bare chip which has a processing circuit for processing data;
a second semiconductor bare chip which has a checking function for detecting faults of said processing circuit; and
a plurality of semiconductor bare chips, including said first and second semiconductor bare chips, that are formed on said wiring substrate.
2. An electronic apparatus according to claim 1 , wherein said semiconductor bare chips include a processor for processing data and a circuit having a checking function for detecting faults of the processor, and
wherein said processor and said circuit are each formed in a bare chip.
3. An electronic apparatus according to claim 1 , wherein said wiring substrate is a multilayer wiring substrate.
4. An electronic apparatus according to claim 3 , wherein said multilayer wiring substrate is a ceramic substrate.
5. An electronic apparatus according to claim 2 , wherein a semiconductor bare chip corresponding to said circuit are connected respectively with said wiring substrate by wire bonding.
6. An electronic apparatus according to claim 2 , wherein the checking function of said circuit is a watch dog timer for resetting said processor when faults of said processor are detected.
7. An electronic apparatus according to claim 1 , wherein at least one of said semiconductor bare chips is a memory for storing data.
8. An electronic apparatus according to claim 2 , wherein a checking function is also provided for detecting faults in said semiconductor chips.
9. An electronic apparatus according to claim 1 , wherein a semiconductor bare chip corresponding to each of said semiconductor chips is connected to data lines by wire bonding.
10. An electronic apparatus according to claim 1 , further comprising:
a plurality of data lines including first data lines provided exclusively on one side of said wiring substrate and second data lines provided exclusively on another side of said wiring substrate.