Packaging of integrated circuits with carbon nano-tube arrays to enhance heat dissipation through a thermal interface
According to one aspect of the invention, a method of constructing an electronic assembly is provided. A layer of metal is formed on a backside of a semiconductor wafer having integrated formed thereon. Then, a porous layer is formed on the metal layer. A barrier layer of the porous layer at the bottom of the pores is thinned down. Then, a catalyst is deposited at the bottom of the pores. Carbon nanotubes are then grown in the pores. Another layer of metal is then formed over the porous layer and the carbon nanotubes. The semiconductor wafer is then separated into microelectronic dies. The dies are bonded to a semiconductor substrate, a heat spreader is placed on top of the die, and a semiconductor package resulting from such assembly is sealed. A thermal interface is formed on the top of the heat spreader. Then a heat sink is placed on top of the thermal interface.
1. A method for forming an electronic assembly, comprising:
forming a plurality of integrated circuits on a wafer;
forming a layer of aluminum on a side of the wafer opposing the integrated circuits;
forming a layer of porous aluminum oxide on the layer of aluminum, the layer of porous aluminum oxide having a side and a plurality of pores, the pores having a barrier layer of aluminum oxide at an end adjacent to the layer of aluminum, the pores covering at least 5% of a surface area of the side;
thinning the barrier layer of aluminum oxide at the end of the pores;
depositing nickel catalysts into the pores;
growing carbon nanotubes in the pores, the carbon nanotubes having a cylindrical shape with diameters between 10 and 1000 angstroms and heights between 1 and 10 microns;
forming a layer of indium on a side of the layer of aluminum oxide opposing the layer of aluminum; and
separating the wafer into microelectronic dies.
2. The method for forming an electronic assembly of claim 1 , further comprising bonding the microelectronic dies with substrates.
3. The method for forming an electronic assembly of claim 1 , further comprising bonding the microelectronic die to a heat spreader which is larger than the microelectronic die.