Devices, methods, and systems with MOS-gated trench-to-trench lateral current flow
A DMOS transistor is fabricated with its source/body/deep body regions formed on the walls of a first set of trenches, and its drain regions formed on the walls of a different set of trenches. A gate region that is formed in a yet another set of trenches can be biased to allow carriers to flow from the source to the drain. Lateral current low from source/body regions on trench walls increases the active channel perimeter to a value well above the amount that would be present if the device was fabricated on just the surface of the wafer. Masking is avoided while open trenches are present. A transistor with a very low on-resistance per unit area is obtained.
1. A three-dimensional active device structure, comprising:
a downwardly extended source diffusion having a first conductivity type;
a downwardly extended body diffusion having a second conductivity type, and laterally positioned adjacent to said source diffusion;
a downwardly extended deep body diffusion having a second conductivity type, and laterally adjoining said body diffusion;
a downwardly extended gate electrode, laterally positioned in proximity to at least part of said body diffusion and insulated therefrom; and
a downwardly extended drain, positioned so that said body diffusion is laterally interposed between said drain and said source;
wherein said source, body, deep body, gate and drain jointly define a respective DMOS-type device structure, having predominantly horizontal current flow, at each of multiple different horizontal planes.
2. The structure of claim 1 , further comprising a conductor which electrically contacts said drain.
3. The structure of claim 1 , further comprising a vertical-walled downwardly-extending trench, filled with a doped semiconductor material, which electrically contacts said drain diffusion.
4. The structure of claim 1 , wherein said diffusions consist essentially of a dopant in silicon.
5. The structure of claim 1 , wherein said first conductivity type is N-type.
6. The structure of claim 1 , wherein said source and body diffusions are both laterally outdiffused from a single trench; and said deep-body diffusion does not correspond solely to outdiffusion from said single trench.
7. The structure of claim 1 , wherein said gate electrode is laterally surrounded by insulator.
8. The structure of claim 1 , wherein at least some ones of said trenches have a depth which is more than 10 times the minimum width thereof.
9. A downwardly extended lateral-conduction device structure, comprising:
a merged source/body trench, and source and deep body diffusions of opposite conductivity types adjacent to the walls thereof; wherein said trench is narrowed at locations where said source diffusions are present;
a source contact conductor which extends into said merged trench, and makes contact with said source and deep body diffusions;
a gate trench, containing conductive material which is capacitively coupled to said body diffusion; and
a downwardly extended drain diffusion, laterally spaced to receive charge carriers from said source diffusion under at least some conditions.
10. The structure of claim 9 , further comprising a conductor which electrically contacts said drain diffusion.
11. The structure of claim 9 , further comprising a vertical-walled downwardly-extending trench, filled with a doped semiconductor material, which electrically contacts said drain diffusion.
12. The structure of claim 9 , wherein said source/body trench has vertical sidewalls.
13. The structure of claim 9 , wherein said source/body trench has notches, in the sidewalls thereof, wherever said source diffusion is not present.
14. The structure of claim 9 , wherein said diffusions comprise silicon plus a dopant.
15. The structure of claim 9 , wherein said source diffusion is N-type.
16. The structure of claim 9 , wherein said source diffusion is laterally surrounded by a second-type body diffusion outdiffused from substantially the same source locations as said source diffusion.
17. The structure of claim 9 , wherein said conductive material in said gate trench is laterally surrounded by insulator.
18. The structure of claim 9 , wherein at least some ones of said trenches have a depth which is more than 10 times the minimum width thereof.
19. A multi-trench device structure, comprising:
a first trench comprising two merged portions: a first substantially continuous portion, and a second portion comprising multiple separated short trench segments which run into said first portion;
a first-type source diffusion adjacent to the walls of said first trench, and a second-type body diffusion which surrounds said source diffusion;
a second-type deep-body diffusion which laterally adjoins said trench segments;
a second trench, containing conductive material which is positioned in lateral proximity to said body diffusion; and
a downwardly extended drain diffusion, adjacent to a third trench, and laterally spaced to receive charge carriers from said source diffusion under at least some conditions.
20. The structure of claim 19 , further comprising a conductor which electrically contacts said drain diffusion.