Method and system for measuring maximum operating frequency and corresponding duty cycle for an I/O cell

1. A circuit for on-chip measurement of a maximum operating frequency of an input implementation under test (IUT), said frequency obeying a plurality of conditions at a maximum frequency, said circuit being synchronized with a central controller for a proper handshaking, said circuit comprising:

an input I/O IUT terminal for receiving an input voltage signal;

a count register connected to the central controller for storing a number of cycles for which a sample test is performed;

a plurality of programmable loads for determining a maximum frequency at a plurality of loads;

a programmable voltage threshold sensor calibrated at an upper threshold limit and a lower threshold limit for analyzing an output voltage signal from said IUT terminal for a desired threshold voltage level;

a ripple counter connected to said voltage threshold sensor for counting passed output voltage signals from said voltage sensor, the passed output voltage signals obeying the desired threshold voltage level;

a time to digital converter (TDC) receiving the output voltage signal from said IUT terminal for converting a width of said output voltage signal to a binary equivalent value; and

an accumulator connected to said TDC for adding a binary value of said output voltage signal for said number of cycles, said circuit utilizes a binary-to-time domain conversion formula for converting said binary value to a time domain value, said time domain value is divided by said cycles to calculate an average high pulse width value, wherein the plurality of conditions comprises:

a signal transition at an IUT output for a low pulse crossing a specified lower voltage threshold limit;

a signal transition at an IUT output for a high pulse crossing a specified upper voltage threshold limit; and

a duty cycle at an I/O output remains within a specified limit.

2. A method for measuring a maximum operating frequency, and its corresponding duty cycle variation of an IUT, said method comprising:

calibrating a time to digital converter to formulate a binary to time domain conversion formula;

calibrating a programmable voltage threshold sensor for an upper voltage threshold value and a lower voltage threshold value;

storing a sample test cycle number (N) through a count register;

applying N input cycles having a high pulse width (HPW) less than a low pulse width (LPW);

shifting out accumulator contents to measure a duty cycle;

shifting out ripple counter contents for checking, if said input cycles crosses an upper threshold voltage; and

checking a ripple count value, and a duty cycle value.

3. The method of claim 2 further comprising decreasing said HPW when the ripple counter value equals to N and the duty cycle value is within a specification.

4. The method of claim 2 further comprising:

storing a last passed HPW value when the ripple counter value is not equal to N and the duty cycle value is not within the specification;

applying N input cycles having an HPW>an LPW;

shifting out the accumulator contents to measure a duty cycle;

shifting out the ripple counter contents for checking, if said input cycles crosses a lower threshold voltage; and

checking a ripple count value and a duty cycle value.

5. The method of claim 4 further comprising decreasing said LPW when the ripple counter value=N and the duty cycle value is within a specification.

6. The method of claim 4 further comprising:

storing a last passed LPW value when the ripple counter value is not equal to N and the duty cycle value is not within the specification; and

calculating said maximum frequency from said passed LPW value and a passed HPW value.