Image sensor using back-illuminated photodiode and method of manufacturing the same
An image sensor using a back-illuminated photodiode and a manufacturing method thereof are provided. According to the present invention, since a surface of the back-illuminated photodiode can be stably treated, the back-illuminated photodiode can be formed to have a low dark current, a constant sensitivity of blue light for all photodiodes, and high sensitivity. In addition, it is possible to manufacture an image sensor with high density by employing a three dimensional structure in which a photodiode and a logic circuit are separately formed on different substrates.
1. An image sensor using a back-illuminated photodiode, comprising:
epi-layers formed on first and second wafers each having a specific type by doping impurities with low concentration;
a potential barrier formed on a surface of the epi-layer of the first wafer;
a back-illuminated photodiode formed on the epi-layer which is formed on a back side of the first wafer;
the second wafer on which a logic circuit is formed;
a metal bonding portion by which a metal wire connected to the back-illuminated photodiode formed on the first wafer is electrically connected to a metal wire connected to the logic circuit formed on the second wafer;
a pad formed on the potential barrier of the first wafer and electrically connected to an external circuit of the image sensor; and
a via formed through the epi-layer and a plug which fills the via so that the pad is electrically connected to the logic circuit of the second wafer.
2. The image sensor of claim 1 , further comprising:
a passivation layer formed on the potential barrier;
a color filter formed on the passivation layer; and
a micro-lens formed on the color filter.
3. The image sensor of claim 1 , wherein the potential barrier is doped with impurities having the same type as the epi-layer and having relatively higher concentration than the epi-layer.
4. A method of manufacturing an image sensor, comprising the steps of:
(a) forming epi-layers with low concentration on first and second wafers each having a specific type, and forming a potential barrier on a surface of the epi-layer of the first wafer;
(b) removing a back side of the first wafer except for the epi-layer;
(c) forming a back-illuminated photodiode on the surface of the epi-layer exposed in (b);
(d) forming an inter-metal dielectric (IMD) layer on the back-illuminated photodiode, and forming a metal wire inside the IMD layer;
(e) forming a via connected to the metal wire through the epi-layer from a surface of the potential barrier, and filling a plug into the via;
(f) forming an IMD layer on the epi-layer formed on the second wafer, and forming a logic circuit including a metal wire inside the IMD layer;
(g) connecting a metal wire of the first wafer to a metal wire of the logic circuit of the second wafer by using metal bonding;
(h) forming a passivation layer, a color filter, and a micro-lens on a surface of the potential barrier; and
(i) forming a pad on a surface of the via filled with the plug of the first wafer.
5. The method of claim 4 , further comprising:
boning a first quartz to the surface of the epi-layer before or after (b); and
removing the first quartz before (h).
6. The method of claim 4 , wherein the potential barrier is formed by using at least one method selected from a group consisting of ion implantation, epi-growth, and boro silicate glass (BSG) deposition.
7. The method of claim 4 , wherein, in (a), after the potential barrier is formed on the first wafer, the surface of the epi-layer on which the potential barrier is formed is stabilized by heat treatment.