Method and apparatus for current-mode ADC

1. A current mode ADC device, comprising:

a first cell including:

a first input terminal to receive an analog input signal;

a second input terminal to receive a reference signal;

a scaling circuit to scale a first one of the input signal and the reference signal;

a comparator to compare the analog input signal and the reference signal and generate a digital output signal; and

an output terminal to transmit an analog output signal to a second cell, wherein the analog output signal is independent from the digital output signal,

wherein the second cell includes:

a second cell first input terminal to receive the analog input signal transmitted from the first cell;

a second cell second input terminal to receive a second cell reference signal;

a second cell scaling circuit to scale a first one of the second cell input signal and the second cell reference signal;

a second cell comparator to compare the analog input signal transmitted from the first cell and the second cell reference signal and generate a second cell digital output signal; and

a second cell output terminal to transmit a second cell analog output signal, wherein the second cell analog output signal is independent from the second cell digital output signal.

2. The device according to claim 1 , wherein the scaling circuit scales the input signal.

3. The device according to claim 1 , wherein the scaling circuit scales the reference signal.

4. The device according to claim 1 , wherein the scaling circuit scales the input signal and the reference signal.

5. The device according to claim 1 , wherein the scaling circuit includes a current mirror.

6. The device according to claim 1 , wherein the ADC device has subnA sensitivity.

7. The device according to claim 1 , wherein a variable dynamic range of the ADC corresponds to the reference signal.

8. The device according to claim 1 , wherein the device can run on a supply voltage of less than about 1.2 Volts and does not contain a capacitor.

9. A method of digitizing an analog signal, comprising:

for a first cell in an analog-to-digital converter:

receiving an analog input signal (I IN (1) for the first cell (1);

receiving a reference signal (I REF );

scaling the analog input signal by a scaling factor k 1 to generate a scaled analog input signal (k 1 I IN (1));

providing the scaled analog input signal (k 1 I IN (1)) and the reference signal (I REF ) to a comparator to generate a digital output signal D O (1); and

generating an analog output signal for transmission to a second cell cascaded to the first cell, wherein the analog output signal is independent of the digital output signal,

wherein the second cell includes:

a second cell first input terminal to receive the analog input signal transmitted from the first cell;

a second cell second input terminal to receive a second cell reference signal;

a second cell scaling circuit to scale a first one of the second cell input signal and the second cell reference signal;

a second cell comparator to compare the analog input signal transmitted from the first cell and the second cell reference signal and generate a second cell digital output signal; and

a second cell output terminal to transmit a second cell analog output signal, wherein the second cell analog output signal is independent from the second cell digital output signal.

10. The method according to claim 9 , wherein the digital output signal is a logical HI if the scaled analog input signal (k 1 I IN (1)) for the first cell is greater than the reference signal (I REF ).

11. The method according to claim 10 , wherein the analog output signal from the first cell corresponds to k 1 I IN (1) −I REF .

12. The method according to claim 9 , further including quantizing the analog input signal by a largest value of n such that the digital output signal D O (n) is a logical HI, where k n I IN (n+1) is less than I REF for cell (n+1), wherein n is a cell index value.

13. The method according to claim 9 , wherein the analog output signal corresponds to k 1 I IN (1).

14. The method according to claim 13 , wherein the digital output signal D O (m:M) is a logical HI when I IN (m)>I REF /k m for a set of cells m=1, 2, . . . , M.

15. The method according to claim 14 , further including quantizing the analog input signal by the smallest m such that the digital output signal D O (m) is a logical LO.

16. The method according to claim 9 , wherein the analog input signal is less than 1 nA.

17. The method according to claim 9 , further including scaling both of the input signal and the reference signal.

18. A method of digitizing an analog signal, comprising:

for a first cell in an analog-to-digital converter:

receiving an analog input signal (I IN (1)) for the first cell (1);

receiving a reference signal (I REF );

scaling the reference signal by a scaling factor k 1 to generate a scaled reference signal (k 1 I REF );

providing the scaled reference signal (k 1 I REF ) and the input signal (I IN (1)) to a comparator to generate a digital output signal D O (1); and

generating an analog output signal for transmission to a second cell cascaded to the first cell, wherein the analog output signal is independent of the digital output signal,

wherein the second cell includes:

a second cell first input terminal to receive the analog input signal transmitted from the first cell;

a second cell second input terminal to receive a second cell reference signal;

a second cell scaling circuit to scale a first one of the second cell input signal and the second cell reference signal;

a second cell comparator to compare the analog input signal transmitted from the first cell and the second cell reference signal and generate a second cell digital output signal; and

a second cell output terminal to transmit a second cell analog output signal, wherein the second cell analog output signal is independent from the second cell digital output signal.

19. The method according to claim 18 , wherein the analog output signal from the first cell corresponds to k 1 I REF −I IN .

20. The method according to claim 18 , further including quantizing the analog input signal by a largest value of n such that the digital output signal D O (n) is a logical HI, where k n I REF (n+1) is less than I IN where n is a cell index value.

21. The method according to claim 18 , further including quantizing the analog input signal by the smallest in such that the digital output signal D O (m) is a logical LO, where m is a cell index value.