Class D amplifier having PWM circuit with look-up table

1. An amplifier comprising:

a noise-shaping modulator to receive a pulse code modulated (PCM) signal and to produce an oversampled PCM signal;

a pulse width modulator to produce a pulse width modulated (PWM) signal from both the oversampled PCM signal and a lookup table referenced by the data in the PCM signal; and

a pulse amplifier to amplify the PWM signal to produce an amplified PWM signal.

2. The amplifier of claim 1 , further comprising:

a demodulator filter to filter the amplified PWM signal to produce an output signal.

3. The amplifier of claim 1 , wherein the noise-shaping modulator comprises a sigma delta modulator.

4. The amplifier of claim 1 , wherein the noise-shaping modulator produces a four bit oversampled PCM signal and the pulse width modulator produces a PWM signal having no more than two bits per sample.

5. The amplifier of claim 4 , wherein the noise-shaping modulator samples at a rate that is at least sixteen times greater than a Nyquist frequency of the PCM signal, and the pulse width modulator samples at a rate that is at least sixteen times greater than the sampling rate of the noise-shaping modulator.

6. The amplifier of claim 1 , wherein the pulse amplifier comprises:

a pulse corrector to filter the PWM signal;

an amplifier power stage to amplify the filtered PWM signal; and

a compensator to provide feedback to the pulse corrector based on the amplified PWM signal.

7. The amplifier of claim 6 , wherein the pulse corrector comprises an analog compensator including a comparator.

8. The amplifier of claim 6 , wherein the amplifier power stage comprises MOSFETs arranged in an H-bridge configuration.

9. The amplifier of claim 8 , wherein the amplifier power stage further comprises programmable blanking delay circuitry.

10. The amplifier of claim 9 , wherein the programmable blanking delay circuitry comprises a multi-tapped delay line.

11. The amplifier of claim 9 , wherein the amplifier power stage further comprises short-circuit protection circuitry.

12. A class D audio amplifier comprising an amplifier power stage including MOSFETs arranged in an H-bridge configuration, wherein the gate width (W opt ) of each MOSFET is defined by:

W

opt

=

3

⁢

P

o

2

⁢

R

L

⁢

KC

ox

⁢

f

sw

⁢

V

gs

2

⁡

(

V

gs

-

V

t

)

wherein P o is output power, R L is output load, f sw is switching frequency, V gs is supply voltage, V t is threshold voltage, K is a conduction factor, and C ox is gate-oxide capacitance.

13. The class D audio amplifier of claim 12 , wherein the gate width of each MOSFET is between about 5 μm and about 5.300 μm.

14. The class D audio amplifier of claim 13 , wherein the gate width of each MOSFET is about 5.150 μm.

15. A class D audio driver comprising:

means for converting a pulse code modulated (PCM) signal to a pulse width modulated (PWM) signal using a lookup table referenced by the data in the PCM signal; and

means for amplifying the PWM signal to produce an amplified signal.

16. The driver of claim 15 , further comprising:

means for filtering the amplified signal to produce an output signal.

17. The driver of claim 15 , wherein the converting means comprises a noise-shaping modulator and a pulse width modulator, wherein the noise-shaping modulator outputs an N-bit PCM signal, and wherein the pulse width modulator uses the lookup table to convert the PCM signal to the PWM signal operating at frequency N times greater than a frequency of the noise-shaping modulator.

18. The driver of claim 17 , wherein the noise-shaping modulator is a third order sigma delta modulator.

19. The driver of claim 17 , wherein the lookup table has a symmetrical structure.

20. The driver of claim 15 , wherein the amplifying means further comprises a closed-loop compensation stage including an integrator, a comparator and an attenuator.