IP Library › Granted Patent US 7,741,151
Granted Patent B2
US 7,741,151 · App. 12/266,406 · Granted Jun 22, 2010

Integrated circuit package formation

Assignee: Freescale Semiconductor, Inc.
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Quick Facts
Patent No.
US 7,741,151
App. No.
12/266,406
Granted
Jun 22, 2010
Kind
B2
Abstract

Integrated circuit packages are formed from a panel where the panel is separated by laser cutting the panel. In some embodiments, the panel is attached to the carrier for the formation of interconnect layers on the panel. Afterwards, the panel is cut with a laser while on the carrier to separate the integrated circuit packages. A tape or other type of structure may be attached to the top of the packages after the laser cutting. The integrated circuit packages are removed from the carrier by releasing the adhesive and removing the integrated circuit packages with the tape. The packages are then removed from the tape.

Claims (45)

1. A method for making an integrated circuit package comprising:

providing a panel attached to a carrier, the panel including a first major surface attached to the carrier, the panel including a plurality of integrated circuit chips encapsulated with an encapsulant;

forming at least one interconnect layer on a second major surface of the panel, the second major surface being an opposite surface to the first major surface, the panel being supported by the carrier during the forming;

laser cutting the panel into a plurality of integrated circuit packages after the forming, the panel being supported by the carrier during the laser cutting, wherein each integrated circuit package includes at least one integrated circuit chip of the plurality of integrated circuits chips;

removing the plurality of integrated circuit packages from the carrier after the laser cutting.

2. The method of claim 1 further comprising:

after the removing, attaching a second panel to the carrier, the second panel including a first major surface attached to the carrier, the second panel including a second plurality of integrated circuit chips encapsulated with an encapsulant;

forming at least one interconnect layer on the second major surface of the second panel, the second major surface of the second panel being an opposite surface to the first major surface of the second panel, the second panel being supported by the carrier during the forming;

laser cutting the second panel into a second plurality of integrated circuit packages after the forming, the second panel being supported by the carrier during the laser cutting, wherein each integrated circuit package of the second plurality of integrated circuit packages includes at least one integrated circuit chip of the second plurality of integrated circuit chips;

removing the second plurality of integrated circuit packages from the carrier after the laser cutting.

3. The method of claim 1 wherein the laser cutting the panel includes laser cutting with a laser beam having a wavelength in a range of 350-530 nanometers.

4. The method of claim 1 wherein the laser cutting the panel includes laser cutting with a laser beam at a power level in a range of 5-50 watts.

5. The method of claim 1 wherein the laser cutting the panel includes laser cutting with a laser beam at a first power level and a first wavelength, wherein the carrier is of a material that is resistant to damage of the laser beam during the laser cutting.

6. The method of claim 5 wherein the carrier is made of ceramic alumina.

7. The method of claim 1 wherein the panel is attached to the carrier with an adhesive, wherein the removing the plurality of integrated circuit packages from the carrier includes exposing the carrier to a solution for releasing the adhesive.

8. The method of claim 1 further comprising:

after the laser cutting and before the removing, attaching a tape to each of the integrated circuit packages of the plurality of integrated circuit packages with an adhesive;

removing the plurality of integrated circuit packages from the tape after the removing the plurality of integrated circuit packages from the carrier.

9. A method of making an integrated circuit package comprising:

providing a panel attached to a carrier, the panel including a first major surface attached to the carrier with an adhesive of a first releasing type, the panel including a plurality of integrated circuit chips encapsulated with an encapsulant;

laser cutting the panel into a plurality of integrated circuit packages, the panel being supported by the carrier during the laser cutting, wherein each integrated circuit package of the plurality of integrated circuit packages includes at least one integrated circuit chip of the plurality of integrated circuit chips;

after the laser cutting, attaching a first structure to each integrated circuit package of the plurality of integrated circuit packages at an opposite side from the first major surface of the panel with an adhesive of a second releasing type that is different from the first releasing type;

removing the plurality of integrated circuit packages from the carrier after the laser cutting and while the plurality of integrated circuit packages are attached to the first structure;

removing the plurality of integrated circuit packages from the first structure after the removing the plurality of integrated circuit packages from the carrier.

10. The method of claim 9 wherein the first structure is a tape material.

11. The method of claim 9 wherein the first releasing type is characterized as a solution releasing type, wherein the removing the plurality of integrated circuit packages from the carrier includes exposing the adhesive of the first releasing type to a solution for releasing the adhesive.

12. The method of claim 11 where the adhesive of a second type is characterized as an ultraviolet (UV) release adhesive, wherein the removing the plurality of integrated circuit packages from the first structure includes exposing the adhesive of the second releasing type to UV radiation.

13. The method of claim 9 further comprising:

prior to the laser cutting, forming at least one interconnect layer on a second major surface of the panel, the panel being supported by the carrier during the forming.

14. The method of claim 9 wherein the laser cutting the panel includes laser cutting with a laser beam having a wavelength in a range of 350-530 nanometers.

15. The method of claim 9 wherein the laser cutting the panel includes laser cutting with a laser beam at a power level in a range of 5-50 watts.

16. The method of claim 9 wherein the laser cutting the panel includes laser cutting with a laser beam at a first power level and a first wavelength, wherein the carrier is of a material that is resistant to damage of the laser beam during the laser cutting.

17. The method of claim 9 further comprising:

after removing the plurality of integrated circuit packages from the carrier, attaching a second panel to the carrier, the second panel including a first major surface attached to the carrier with an adhesive of the first releasing type, the second panel including a second plurality of integrated circuit chips encapsulated with an encapsulant;

laser cutting the second panel into a second plurality of integrated circuit packages after the attaching the second panel to the carrier, the second panel being supported by the carrier during the laser cutting, wherein each integrated circuit package of the second plurality of integrated circuit packages includes at least one integrated circuit chip of the second plurality of integrated circuit chips;

removing the second plurality of integrated circuit packages from the carrier after the laser cutting.

18. The method of claim 9 wherein the carrier is made of ceramic alumina.

19. The method of claim 9 wherein the removing the plurality of integrated circuit packages from the first structure includes individually removing each integrated circuit package of the plurality of integrated circuit packages with an automatic package picking device.

20. A method of making an integrated circuit package comprising:

attaching a panel to a carrier, the panel including a first major side and a second major side, the second major side being an opposing side to the first major side, the attaching includes attaching the panel to the carrier at the first major side with an adhesive of a first releasing type, the panel including a plurality of integrated circuit chips encapsulated with an encapsulant;

forming at least one interconnect layer on the second major side, the panel being supported by the carrier during the forming;

laser cutting the panel into a plurality of integrated circuit packages after the forming, the panel being supported by the carrier during the laser cutting, wherein each integrated circuit package of the plurality of integrated circuit packages includes at least one integrated circuit chip of the plurality of integrated circuit chips;

after the laser cutting, attaching a tape to each integrated circuit package of the plurality of integrated circuit packages at an opposite side to the first major side of the panel with an adhesive of a second releasing type that is different from the first releasing type;

removing the plurality of integrated circuit packages from the carrier after the laser cutting and while the plurality of integrated circuit packages are attached to the tape;

removing the plurality of integrated circuit packages from the tape.

Assignments (15)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 053547/0421 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
Reel/Frame 048734/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041703/0536 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 4, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: NORTH STAR INNOVATIONS INC.
Reel/Frame 037694/0264 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037518/0292 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037486/0517 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037354/0807 →
SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 031591/0266 →
SECURITY AGREEMENT Recorded Jun 18, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 030633/0424 →
SECURITY AGREEMENT Recorded Mar 12, 2009
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A.
Reel/Frame 022380/0409 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 7, 2008
From: ARMINE, CRAIG S.; LYTLE, WILLIAM H.
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 021804/0600 →
Continuity (1)
Related Publication 20100112756A1 · May 6, 2010