IP Library Granted Patent US 7,749,831
Granted Patent B2
US 7,749,831 · App. 12/043,526 · Granted Jul 6, 2010

Methods for fabricating solid state image sensor devices having non-planar transistors

Assignee: Samsung Electronics Co., Ltd.
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Quick Facts
Patent No.
US 7,749,831
App. No.
12/043,526
Granted
Jul 6, 2010
Kind
B2
Abstract

Methods for fabricating CMOS image sensor devices are provided, wherein active pixel sensors are constructed with non-planar transistors having vertical gate electrodes and channels, which minimize the effects of image lag and dark current.

Claims (15)

1. A method for fabricating an image sensor device having a light receiving region, a reset transistor, a floating diffusion region and an amplifier element operatively connected to the floating diffusion region, the method comprising:

forming an active region of a unit pixel on a substrate surrounded by an isolation layer;

forming a recess in the isolation layer; and

forming a transfer gate in the recess, wherein the transfer gate comprises a vertical gate electrode vertically extended to a predetermined depth below a surface of the substrate.

2. The method for fabricating an image sensor device according to claim 1 , wherein forming a recess comprises forming at least two recesses in the isolation layer adjacent to side regions of the active region in proximity to the light receiving region.

3. The method for fabricating an image sensor device according to claim 1 , further comprising forming a recessed surface between the light receiving region and the floating diffusion region.

4. A method for fabricating an image sensor device, comprising:

defining an active region of a unit pixel on a substrate surrounded by an isolation layer;

forming a light receiving element in the substrate;

etching recesses in the isolation layer;

etching an upper surface of the substrate in a channel region;

forming a dielectric layer in the recesses and on the upper surface of the substrate;

depositing a conductive layer in the recesses and on the upper surface to form a charge transfer element;

forming a floating diffusion region between the charge transfer element and the light receiving element; and

forming a reset transistor and an amplifier element in the substrate.

Priority Claims (1)
KR 10-2004-83968 · Oct 20, 2004 · national
Continuity (2)
Division 1121184000 · Aug 25, 2005
Related Publication 20080153193A1 · Jun 26, 2008