Method and system to map virtual PCIe I/O devices and resources to a standard I/O bus

1. A system comprising:

a virtual device detector to detect a virtual Peripheral Component Interconnect Express (PCIe) device;

a resource allocator to allocate, from a pool of available resources, a plurality of resources to the virtual PCIe device, the resource allocator being implemented in a module comprising hardware;

an activation module, to generate a set of entries in a resource mapping table, the set of entries corresponding to the allocated plurality of resources, the set of entries to define the virtual PCIe device; and

a device address mapper to map the virtual PCIe device to a resource address of an allocated resource of the plurality of resources by using:

a base address register (BAR) match table to store a base address of the virtual PCIe device;

the resource mapping table to store the set of entries, an entry of the set of entries including a scaling field; and

a variable address scaling (VAS) module to determine the resource address of the allocated resource based on the scaling field.

2. The system of claim 1 , wherein the scaling field is at least one of:

a mask size to preserve an address bit;

a shift amount to specify a number of bit positions; or

a shift direction to specify rightward or leftward bit shift.

3. The system of claim 2 , wherein the virtual PCIe device is a virtual Network Interface Card (vNIC).

4. The system of claim 1 , wherein the device address mapper is to:

receive a PCIe address that matches the base address of the virtual PCIe device; and

provide the resource address of the allocated resource.

5. The system of claim 4 , wherein the virtual PCIe device is to provide I/O memory mapping unit (IOMMU) control interface.

6. The system of claim 1 , wherein the pool of available resources comprises a plurality of direct memory access (DMA) transmit queues.

7. The system of claim 1 , wherein the virtual PCIe device is presented to a host server as a physical PCIe device associated with a particular BAR in a configuration space presented to the host system.

8. The system of claim 7 , wherein the BAR match table is a fully associative BAR match table to cache the particular BAR, the particular BAR being stored in a direct mapped storage structure.

9. The system of claim 7 , wherein the set of entries in the resource mapping table corresponds to the particular BAR in the configuration space presented to the host system.

10. The system of claim 1 , wherein the entry in the set of entries in the resource mapping table is to indicate a target control register in a physical address space associated with an adaptor to maintain the virtual PCIe device.

11. The system of claim 1 , wherein the resource allocator is to allocate the plurality of resources to the virtual PCIe device such that the allocated resources are for exclusive use by the virtual PCIe device.

12. A method comprising:

detecting a virtual Peripheral Component Interconnect Express (PCIe) device;

allocating, from a pool of available resources, a plurality of resources to the virtual PCIe device, the allocating being performed by a module comprising hardware;

generating a set of entries in a resource mapping table, the set of entries corresponding to the allocated plurality of resources, the set of entries to define the virtual PCIe device; and

mapping the virtual PCIe device to a resource address of an allocated resource of the plurality of resources by using:

a base address register (BAR) match table to store a base address of the virtual PCIe device;

the resource mapping table to store the set of entries, an entry of the set of entries including a scaling field; and

a variable address scaling (VAS) module to determine the resource address of the allocated resource based on the scaling field.

13. The method of claim 12 , wherein the scaling field is at least one of:

a mask size to preserve an address bit;

a shift amount to specify a number of bit positions; or

a shift direction to specify rightward or leftward bit shift.

14. The method of claim 12 , wherein the virtual PCIe device is a virtual Network Interface Card (vNIC).

15. The method of claim 12 , further comprising:

receiving a PCIe address that matches the base address of the virtual PCIe device; and

providing the resource address of the allocated resource.

16. The method of claim 15 , wherein the virtual PCIe device is to provide I/O memory mapping unit (IOMMU) control interface.

17. The method of claim 12 , wherein the pool of available resources comprises a plurality of direct memory access (DMA) transmit queues.

18. The method of claim 12 , comprising presenting the virtual PCIe device to a host server as a physical PCIe device associated with a particular BAR in a configuration space presented to the host system.

19. The method of claim 18 , including:

storing the particular BAR in the BAR match table; and wherein

the BAR match table is a direct mapped storage structure; and

the BAR match table is a fully associative BAR match table.

20. The method of claim 18 , wherein the set of entries in the resource mapping table corresponds to the particular BAR in the configuration space presented to the host system.

21. The method of claim 12 , wherein the entry in the set of entries in the resource mapping table is to indicate a target control register in a physical address space associated with an adaptor to maintain the virtual PCIe device.

22. The method of claim 12 , wherein the allocating of the plurality of resources comprises allocating the plurality of resources such that the allocated resources are for exclusive use by the virtual PCIe device.