IP Library › Granted Patent US 7,760,028
Granted Patent B2
US 7,760,028 · App. 11/720,319 · Granted Jul 20, 2010

Transformer circuit

Assignee: ST-Ericsson SA
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Quick Facts
Patent No.
US 7,760,028
App. No.
11/720,319
Filed
Jun 11, 2008
Granted
Jul 20, 2010
Kind
B2
Art Unit
2817
USPC
330/301
Abstract

A BALUN circuit ( 20 ) for low voltage operation for receiving single ended input signal at an input terminal ( 24 ) and providing a differential output signal across a pair of output terminals (OUT+, OUT−) is disclosed. The BALUN circuit ( 20 ) comprises a first branch including an input terminal ( 24 ) for receiving a single ended input voltage signal (RFin), a transistor (Q 1 ), a resistance (R 1 ) ( 28 ), a resistance (RL), and an output terminal (OUT+). A second branch includes a transistor (Q 3 ), a resistance (RL) and an output terminal (OUT−). An operational amplifier ( 26 ) maintains current flowing through the resistances RL in the first and second branches substantially equal to each other, in dependence upon the output voltage signal across the output terminals (OUT+, OUT−).

Claims (31)

1. An unbalanced/balanced transformer circuit for receiving single ended input signal at an input terminal and providing a differential output signal across a pair of output terminals, the circuit comprising:

a first branch including an input terminal for receiving a single ended input voltage signal, a first transistor, a first resistance connected between said input terminal and a first terminal of said first transistor to provide a current signal flowing through said first transistor, a second resistance connected to a second terminal of said first transistor for providing a voltage output signal, and an output terminal;

a second branch including at least one second transistor, a third resistance for providing an output signal dependent upon a current signal flowing through said second transistor, and an output terminal; and

current matching means for maintaining current flowing through said third resistance substantially equal to the current flowing through said second resistance, in dependence upon the output voltage signal across said output terminals, wherein the current matching means comprises voltage-sensing means for sensing voltage differences between the output terminals and providing a signal to the second transistor to adjust the current flowing therethrough.

2. A circuit according to claim 1 , wherein the voltage-sensing means includes a differential amplifier.

3. A circuit according to claim 1 , further comprising a third transistor in said second branch connected between said third resistance and said second transistor.

4. A circuit according to claim 3 , further comprising an adjustable capacitor connected between a first terminal of said third transistor and the first terminal of the first transistor.

5. A circuit according to claim 3 , further comprising an adjustable capacitor connected between a third terminal of said first transistor and a second terminal of said third transistor.

6. A circuit according to claim 1 , further comprising an input capacitor connected between the input terminal and a second terminal of the second transistor.

7. A circuit according to claim 1 , further comprising a voltage divider circuit connected to the current matching means and the second transistor.

8. An unbalanced/balanced transformer circuit for receiving single ended input signal at an input terminal and providing a differential output signal across a pair of output terminals, the circuit comprising:

a first branch including an input terminal for receiving a single ended input voltage signal, a first transistor, a first resistance connected between said input terminal and a first terminal of said first transistor to provide a current signal flowing through said first transistor, a second resistance connected to a second terminal of said first transistor for providing a voltage output signal, and an output terminal;

a second branch including at least one second transistor, a third resistance for providing an output signal dependent upon a current signal flowing through said second transistor, a third transistor connected between the third resistance and the second transistor, and an output terminal;

an adjustable capacitor connected between a first terminal of said third transistor and the first terminal of the first transistor; and

current matching means for maintaining current flowing through said third resistance substantially equal to the current flowing through said second resistance, in dependence upon the output voltage signal across said output terminals.

9. A circuit according to claim 7 , wherein the current matching means comprises voltage-sensing means for sensing voltage differences between the output terminals and providing a signal to the second transistor to adjust the current flowing therethrough.

10. A circuit according to claim 9 , wherein the voltage-sensing means includes a differential amplifier.

11. A circuit according to claim 7 , further comprising an adjustable capacitor connected between an adjustable capacitor connected between a third terminal of said first transistor and a second terminal of said third transistor.

12. A circuit according to claim 7 , further comprising an input capacitor connected between the input terminal and a second terminal of the second transistor.

13. A circuit according to claim 7 , further comprising a voltage divider circuit connected to the current matching means and the second transistor.

14. A circuit according to claim 7 , further comprising a resistor connected between the current matching means and a first terminal of the second transistor.

15. An unbalanced/balanced transformer circuit for receiving single ended input signal at an input terminal and providing a differential output signal across a pair of output terminals, the circuit comprising:

a first branch including an input terminal for receiving a single ended input voltage signal, a first transistor, a first resistance connected between said input terminal and a first terminal of said first transistor to provide a current signal flowing through said first transistor, a second resistance connected to a second terminal of said first transistor for providing a voltage output signal, and an output terminal;

a second branch including at least one second transistor, a third resistance for providing an output signal dependent upon a current signal flowing through said second transistor, a third transistor connected between the third resistance and the second transistor, and an output terminal;

an adjustable capacitor connected between a third terminal of the first transistor and a second terminal of the third transistor; and

current matching means for maintaining current flowing through said third resistance substantially equal to the current flowing through said second resistance, in dependence upon the output voltage signal across said output terminals.

16. A circuit according to claim 15 , wherein the current matching means comprises voltage-sensing means for sensing voltage differences between the output terminals and providing a signal to the second transistor to adjust the current flowing therethrough.

17. A circuit according to claim 16 , wherein the voltage-sensing means includes a differential amplifier.

18. A circuit according to claim 15 , further comprising an input capacitor connected between the input terminal and a second terminal of the second transistor.

19. A circuit according to claim 15 , further comprising a voltage divider circuit connected to the current matching means and the second transistor.

20. A circuit according to claim 15 , further comprising a resistor connected between the current matching means and a first terminal of the second transistor.

Assignments (5)
CHANGE OF NAME Recorded Feb 2, 2016
From: ST WIRELESS SA
To: ST-ERICSSON SA
Reel/Frame 037683/0128 →
STATUS CHANGE-ENTITY IN LIQUIDATION Recorded Feb 2, 2016
From: ST-ERICSSON SA
To: ST-ERICSSON SA, EN LIQUIDATION
Reel/Frame 037739/0493 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 8, 2010
From: NXP B.V.
To: ST WIRELESS SA
Reel/Frame 024503/0955 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 5, 2008
From: KONINKLIJKE PHILIPS ELECTRONICS N.V.
To: NXP B.V.
Reel/Frame 021340/0053 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 11, 2008
From: SANDULEANU, MIHAI A., T.; STIKVOORT, EDUARD F.
To: NXP B.V.
Reel/Frame 021082/0198 →
Priority Claims (1)
EP 04106101 · Nov 26, 2004 · regional
Continuity (1)
Related Publication 20080252381A1 · Oct 16, 2008