IP Library › Granted Patent US 7,767,589
Granted Patent B2
US 7,767,589 · App. 11/848,820 · Granted Aug 3, 2010

Passivation layer for a circuit device and method of manufacture

Assignee: Raytheon Company
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Quick Facts
Patent No.
US 7,767,589
App. No.
11/848,820
Granted
Aug 3, 2010
Kind
B2
Abstract

According to one embodiment of the disclosure, a method for passivating a circuit device generally includes providing a substrate having a substrate surface, forming an electrical component on the substrate surface, and coating the substrate surface and the electrical component with a first protective dielectric layer. The first protective dielectric layer is made of a generally moisture insoluble material having a moisture permeability less than 0.01 gram/meter 2 /day, a moisture absorption less than 0.04 percent, a dielectric constant less than 10, a dielectric loss less than 0.005, a breakdown voltage strength greater than 8 million volts/centimeter, a sheet resistivity greater than 10 15 ohm-centimeter, and a defect density less than 0.5/centimeter 2 .

Claims (11)

1. A method for manufacturing an integrated circuit comprising:

providing a substrate having a substrate surface;

forming an electrical component comprising at least a transistor or a capacitor on the substrate surface;

coating the substrate surface and electrical component with a first protective dielectric layer made of alumina, the first protective dielectric layer having a thickness that is in the range of approximately 50 to 2000 angstroms;

etching a portion of the first protective dielectric layer from the substrate surface or the electrical component in order to form a contact surface;

forming an air bridge on the contact surface;

coating the first protective dielectric layer, the electrical component, and the air bridge with a second protective dielectric layer made of alumina, the second protective dielectric layer having a thickness that is in the range of approximately 50 to 2000 angstroms;

applying an adhesion promoter to the second protective dielectric layer; and

coating the second protective dielectric layer with a third dielectric layer made of alumina, silica, parylene F, aromatic-fluorinated VT-4, and parylene HT®, the third dielectric layer having a thickness that is in the range of approximately 100 to 1000 angstroms.

2. The method of claim 1 , wherein the act of applying an adhesion promoter comprises applying an adhesion promoter comprising a layer of silicon dioxide used independently or in conjunction with gamma-methacryloxypropyltrimethoxysilane.

3. The method of claim 1 , wherein the act of providing a substrate comprises providing a substrate made of a material selected from the group consisting of silicon (Si), gallium-arsenide (GaAs), Gallium-Nitride (GaN), germanium (Ge), silicon-carbide (SiC), and indium-phosphide (InP).

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 31, 2007
From: BEDINGER, JOHN M.; MOORE, MICHAEL A.; HALLOCK, ROBERT B.; TABATABAIE-ALAVI, KAMAL (NMI); KAZIOR, THOMAS E.
To: RAYTHEON COMPANY
Reel/Frame 019775/0378 →
Continuity (2)
Provisional Application 6088872000 · Feb 7, 2007
Related Publication 20080185174A1 · Aug 7, 2008