IP Library Granted Patent US 7,768,009
Granted Patent B2
US 7,768,009 · App. 12/196,798 · Granted Aug 3, 2010

Display device and manufacturing method of the same

Assignee: Semiconductor Energy Laboratory Co., Ltd.
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,768,009
App. No.
12/196,798
Granted
Aug 3, 2010
Kind
B2
Abstract

A display device including a thin film transistor with high electric characteristics and high reliability, and a method for manufacturing the display device with high mass-productivity. In a display device including an inverted-staggered channel-stop-type thin film transistor, the inverted-staggered channel-stop-type thin film transistor includes a microcrystalline semiconductor film including a channel formation region, and an impurity region containing an impurity element of one conductivity type is selectively provided in a region which is not overlapped with source and drain electrodes, in the channel formation region of the microcrystalline semiconductor film.

Claims (34)

1. A display device comprising:

a gate electrode;

a gate insulating film over the gate electrode;

a microcrystalline semiconductor film including a channel formation region over the gate insulating film;

a buffer layer over the microcrystalline semiconductor film;

a channel protective layer in a region which is overlapped with the channel formation region of the microcrystalline semiconductor film, over the buffer layer;

a source and drain regions over the channel protective layer and the buffer layer; and

a source and drain electrodes over the source and drain regions,

wherein an impurity region containing an impurity element which imparts one conductivity type is provided selectively in the channel formation region of the microcrystalline semiconductor film.

2. The display device according to claim 1 , wherein the impurity region is provided in the channel formation region of the microcrystalline semiconductor film between the source and drain electrodes.

3. The display device according to claim 1 , wherein the impurity element which imparts one conductivity type is an impurity element which imparts p-type conductivity.

4. The display device according to claim 1 , wherein a pixel electrode which is electrically connected to the source or drain electrode is included.

5. The display device according to claim 1 , wherein the buffer layer is formed of an amorphous semiconductor film.

6. The display device according to claim 5 , wherein the buffer layer is formed of an amorphous semiconductor film containing nitrogen.

7. The display device according to claim 5 , wherein the buffer layer is formed of an amorphous semiconductor film containing hydrogen.

8. The display device according to claim 5 , wherein the buffer layer is formed of an amorphous semiconductor film containing fluorine, chlorine, bromine, or iodine.

9. The display device according to claim 5 , wherein the buffer layer is the amorphous semiconductor film in which total concentration of contained nitrogen, carbon, and oxygen is equal to or greater than 1×10 20 atoms/cm 3 and equal to or less than 1.5×10 21 atoms/cm 3 .

10. A display device comprising:

a gate electrode;

a gate insulating film over the gate electrode;

a microcrystalline semiconductor film including a channel formation region over the gate insulating film;

a channel protective layer in a region which is overlapped with the channel formation region of the microcrystalline semiconductor film;

a buffer layer over the microcrystalline semiconductor film and the channel protective layer;

a source and drain regions over the buffer layer; and

a source and drain electrodes over the source and drain regions,

wherein an impurity region containing an impurity element which imparts one conductivity type is provided selectively in the channel formation region of the microcrystalline semiconductor film.

11. The display device according to claim 10 , wherein the impurity region is provided in the channel formation region of the microcrystalline semiconductor film between the source and drain electrodes.

12. The display device according to claim 10 , wherein the impurity element which imparts one conductivity type is an impurity element which imparts p-type conductivity.

13. The display device according to claim 10 , wherein a pixel electrode which is electrically connected to the source or drain electrode is included.

14. The display device according to claim 10 , wherein the buffer layer is formed of an amorphous semiconductor film.

15. The display device according to claim 14 , wherein the buffer layer is formed of an amorphous semiconductor film containing nitrogen.

16. The display device according to claim 14 , wherein the buffer layer is formed of an amorphous semiconductor film containing hydrogen.

17. The display device according to claim 14 , wherein the buffer layer is formed of an amorphous semiconductor film containing fluorine, chlorine, bromine, or iodine.

18. The display device according to claim 14 , wherein the buffer layer is the amorphous semiconductor film in which total concentration of contained nitrogen, carbon, and oxygen is equal to or greater than 1×10 20 atoms/cm 3 and equal to or less than 1.5×10 21 atoms/cm 3 .

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 22, 2008
From: KABAYASHI, SATOSHI; KAWAMATA, IKUKO; KAIRIKI, KOJI; KOMORI, SHIGEKI; ISA, TOSHIYUKI; YAMAZAKI, SHUNPEI
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 021431/0084 →
Priority Claims (1)
JP 2007-227073 · Aug 31, 2007 · national
Continuity (1)
Related Publication 20090057672A1 · Mar 5, 2009