IP Library Granted Patent US 7,772,595
Granted Patent B2
US 7,772,595 · App. 11/554,603 · Granted Aug 10, 2010

Nitride semiconductor substrate, method for forming a nitride semiconductor layer and method for separating the nitride semiconductor layer from the substrate

Assignee: Industrial Technology Research Institute
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Quick Facts
Patent No.
US 7,772,595
App. No.
11/554,603
Granted
Aug 10, 2010
Kind
B2
Abstract

There is provided a method of forming a nitride semiconductor layer, including the steps of firstly providing a substrate on which a patterned epitaxy layer with a pier structure is formed. A protective layer is then formed on the patterned epitaxy layer, exposing a top surface of the pier structure. Next, a nitride semiconductor layer is formed over the patterned epitaxy layer connected to the nitride semiconductor layer through the pier structure, wherein the nitride semiconductor layer, the pier structure, and the patterned epitaxy layer together form a space exposing a bottom surface of the nitride semiconductor layer. Thereafter, a weakening process is performed to remove a portion of the bottom surface of the nitride semiconductor layer and to weaken a connection point between the top surface of the pier structure and the nitride semiconductor layer. Finally, the substrate is separated from the nitride semiconductor layer through the connection point.

Claims (8)

1. A nitride semiconductor substrate, comprising:

a substrate;

a gallium nitride (GaN) semiconductor layer extending substantially across an entire area above the substrate;

a multi-spaced structure disposed between the substrate and the GaN semiconductor layer, wherein the multi-spaced structure has a plurality of piers directly in contact with a portion of a bottom surface of the GaN semiconductor layer and a space between the piers exposes the rest portion of the bottom surface of the GaN semiconductor layer and exposes a surface of the multi-spaced structure;

a protective layer covering the surface of the multi-spaced structure.

2. The nitride semiconductor substrate of claim 1 , wherein the material of the substrate comprises silicon, silicon carbide, sapphire, arsenide, phosphide, zinc oxide (ZnO), and magnesium oxide.

3. The nitride semiconductor substrate of claim 1 , wherein the material of the protective layer comprises dielectric material.

4. The nitride semiconductor substrate of claim 1 , wherein a shape of a cross-sectional profile of each of the piers comprises a point shape and a bar shape.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 18, 2006
From: GUO, YIH-DER; LAI, CHIH-MING; TSAY, JENQ-DAR; LIU, PO-CHUN
To: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
Reel/Frame 018534/0308 →
Priority Claims (1)
TW 95132153 A · Aug 31, 2006 · national
Continuity (1)
Related Publication 20080054292A1 · Mar 6, 2008