Phase change memory and control method thereof
A phase change memory wherein several phase change storage elements are coupled in series to share a single current source. The current provided by the current source is directed by a plurality of switches. To write/read the phase change storage elements, the invention provides techniques to control the current value generated by the current source and controls the states of the switches. The impedance summation of the phase change storage elements vary with the data stored therein.
1. A phase change memory, comprising:
a current source, providing an input current;
a first phase change storage element, coupled to the current source;
a second phase change storage element, coupled in series with the first phase change storage element via a first node;
a first switch, coupled to the first node to provide a first current path directing the input current to flow through the first phase change storage element;
a second switch, coupled in series with the second phase change storage element to provide a second current path directing the input current to flow through both the first and second phase change storage elements; and
a control module, controlling the first and second switches and the input current to set an impedance summation of the first and second phase change storage elements to vary with data stored therein.
2. The phase change memory as claimed in claim 1 , wherein the control module turns off the first switch, turns on the second switch and sets the input current equal to a read current to produce a voltage difference across the first and second phase change storage elements.
3. The phase change memory as claimed in claim 2 , further comprising a plurality of comparators comparing the said voltage difference with a plurality of reference voltages to determine the data stored in the first and second phase change storage elements.
4. The phase change memory as claimed in claim 2 , wherein the first and second phase change storage elements have different manufacturing parameters.
5. A method of controlling a phase change memory, comprising:
providing the phase change memory, comprising:
a current source, providing an input current;
a first phase change storage element, coupled to the current source;
a second phase change storage element, coupled in series with the first phase change storage element via a first node;
a first switch, coupled to the first node to provide a first current path directing the input current to flow through the first phase change storage element; and
a second switch, coupled in series with the second phase change storage element to provide a second current path directing the input current to flow through both the first and second phase change storage elements; and
storing data into the first and second phase change storage elements by controlling the first and second switches and the input current, wherein an impedance summation of the first and second phase change storage elements is set to vary with the data stored in the first and second phase change storage elements.
6. The method as claimed in claim 5 , further comprising turning off the first switch, turning on the second switch and setting the input current to equal to a read current to produce a voltage difference across the first and second phase change storage elements.
7. The method as claimed in claim 6 , further comprising comparing the said voltage difference with a plurality of reference voltages to determine the data stored in the first and second phase change storage elements.
8. The method as claimed in claim 5 , wherein the step of storing data further comprises turning off the first switch and turning on the second switch to store the same value in the first and second phase change storage elements.
9. The method as claimed in claim 5 , wherein the step of storing data further comprises storing different values in the first and second phase change storage elements by turning off the first switch and turning on the second switch during a first stage, and turning on the first switch and turning off the second switch during a second stage.
10. The method as claimed in claim 5 , wherein the step of storing data further comprises setting a set mode time interval of the first phase change storage element to be unequal to that of the first phase change storage element.
11. The method as claimed in claim 5 , wherein the step of storing data further comprises setting a set mode current of the first phase change storage element to be unequal to that of the first phase change storage element.