Analog to digital converters

1. An analog to digital converter (ADC) for converting an analog signal to a digital signal, comprising:

an input channel for receiving said analog signal;

a sampling circuit coupled to said input channel for sampling said analog signal and for providing a sampled analog signal, wherein said sampling circuit comprises an energy storage unit coupled to said input channel for storing charges from said input channel and comprises a switch array coupled to said energy storage unit for controlling said energy storage unit;

an integrator coupled to said sampling circuit for receiving said sampled analog signal and a feedback signal and for integrating a superposition of said sampled analog signal and said feedback signal; and

a feedback circuit coupled to said integrator for generating said digital signal according to an output of said integrator and for sending said feedback signal indicative of said digital signal to said integrator.

2. The ADC of claim 1 , wherein said input channel is coupled to a switch.

3. The ADC of claim 1 , wherein said integrator comprises an integrating capacitor coupled to a switch in series for storing said charges from said energy storage unit when said switch is turned on.

4. The ADC of claim 1 , wherein said integrator comprises an error amplifier coupled to said sampling circuit for comparing a reference signal with said superposition of said feedback signal and said sampled analog signal and for generating an error signal.

5. The ADC of claim 1 , wherein said feedback circuit comprises a comparator coupled to said integrator for comparing said output of said integrator with a reference signal and for generating a comparator output signal according to said comparison result.

6. The ADC of claim 5 , wherein said feedback circuit comprises a multiplexer coupled to said comparator for providing said digital signal according to said comparator output signal.

7. The ADC of claim 1 , wherein said feedback circuit comprises a secondary digital to analog converter (DAC) coupled to said integrator for generating said feedback signal.

8. The ADC of claim 1 , further comprising:

a filter coupled to said feedback circuit for decimating said digital signal.

9. A method comprising:

sampling an analog signal by a sampling circuit to provide a sampled analog signal;

integrating a superposition of said sampled analog signal and a feedback signal;

comparing a reference signal with said superposition of said feedback signal and said sampled analog signal;

generating an error signal according to a difference between said reference signal and said superposition;

generating a first digital signal according to an integration result of said superposition;

generating said feedback signal indicative of said first digital signal; and

generating a multi-bit digital signal according to said first digital signal.

10. The method of claim 9 , further comprising:

receiving said analog signal by an input channel.

11. The method of claim 9 , wherein integrating said superposition comprises:

transferring charges from said sampling circuit to an integrating capacitor.

12. The method of claim 11 , wherein generating said first digital signal comprises:

generating an integrator output according to previous charges stored in said integrating capacitor and according to said integration result of said superposition;

comparing said integrator output with a reference signal; and

generating said first digital signal according to said comparison result.

13. An analog to digital converter (ADC) for converting a plurality of analog signals to a plurality of digital output signals, comprising:

a plurality of input channels for receiving said analog signals;

a sampling circuit coupled to said plurality of input channels for sampling a corresponding analog signal from a selected input channel of said input channels and for providing a sampled analog signal;

an integrator coupled to said sampling circuit for receiving said sampled analog signal and a feedback signal and for integrating a superposition of said sampled analog signal and said feedback signal, wherein said integrator comprises a plurality of capacitors coupled in parallel, and wherein one of said capacitors is selected to store and accumulate charges contained in said sampled analog signal;

a feedback circuit coupled to said integrator for generating a digital signal according to an output of said integrator and for sending said feedback signal indicative of said digital signal to said integrator; and

a plurality of output channels coupled to said feedback circuit for generating said digital output signals.

14. The ADC of claim 13 , wherein said plurality of input channels are coupled to a plurality of switches.

15. The ADC of claim 13 , wherein said sampling circuit comprises an energy storage unit coupled to said plurality of input channels for storing charges from said selected input channel, and wherein said sampling circuit comprises a switch array coupled to said energy storage unit for controlling said energy storage unit.

16. The ADC of claim 13 , wherein said plurality of capacitors are coupled to a plurality of switches respectively, and wherein said one of said plurality of capacitors is selected to stores and accumulate said charges contained in said sampled analog signal when an associate switch is turned on.

17. The ADC of claim 13 , wherein said feedback circuit comprises a comparator coupled to said integrator for comparing said output of said integrator with a reference signal and for generating a comparator output signal according to said comparison result.

18. The ADC of claim 17 , wherein said feedback circuit comprises a multiplexer coupled to said comparator for providing said digital signal according to said comparator output signal.

19. The ADC of claim 13 , wherein said feedback circuit comprises a secondary digital to analog converter (DAC) coupled to said integrator for generating said feedback signal.