IP Library Granted Patent US 7,796,399
Granted Patent B2
US 7,796,399 · App. 12/317,892 · Granted Sep 14, 2010

Thin multi-chip flex module

Assignee: Microelectronics Assembly Technologies, Inc.
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Quick Facts
Patent No.
US 7,796,399
App. No.
12/317,892
Granted
Sep 14, 2010
Kind
B2
Abstract

A multichip module comprises a multilayer substrate circuit having conductive patterns on its surface(s) to which microelectronic device(s) are attached. The conductive patterns include a series of electrical contacts adjacent to one edge of the substrate. The substrate is bonded to two rigid frames, one on each opposite surface. Each substrate has a series of castellations on one edge that are aligned and electrically connected to the respective contacts on the substrate, preferably by soldering. The castellations can serve as a self-aligning mechanism when the module is brought into contact with a low-profile pin array, and the module may be held in place on a motherboard by guide rails in a socket that engages the edges perpendicular to the castellated edge of the module. The module may further be provided with protective heat spreading covers.

Claims (22)

1. A multichip module comprising:

a flexible multilayer dielectric substrate having a first surface and a second surface;

a conductive pattern on said first surface, said conductive pattern including a plurality of contacts adjacent to one edge of said substrate;

a conductive pattern on said second surface, said conductive pattern including a plurality of contacts adjacent to said one edge of said substrate;

a plurality of microelectronic devices attached to said substrate and operably coupled to said conductive patterns; and,

two substantially rigid frames extending around the periphery of said dielectric substrate, one on each of said first and second surfaces, said frames having a plurality of metallized castellations aligned with and electrically connected to respective contacts on said substrate.

2. The multichip module of claim 1 wherein said microelectronic devices are selected from the group consisting of: memory circuits, logic circuits, buffer devices, interface devices, optoelectronic devices, active and passive RF devices, and microprocessors.

3. The multichip module of claim 1 wherein said frames further comprise heat spreading covers.

4. The multichip module of claim 3 wherein said covers provide electrical shielding.

5. The multichip module of claim 1 wherein said frames are connected to one another along a selected fold axis so that by folding about said axis said rigid frames may be brought together to enclose said flexible multilayer dielectric substrate.

6. The multichip module of claim 1 wherein said metallized castellations are configured to engage respective pins in a mating socket.

7. The multichip module of claim 1 wherein the side edges of said frames are configured to engage guide rails in a socket and said socket is configured to hold said castellations in contact with corresponding pins on a motherboard.

8. A method for making a multichip module comprising the steps of:

forming a flexible dielectric substrate having a first surface and a second surface;

forming a conductive pattern on said first surface, said conductive pattern including a plurality of contacts adjacent to one edge of said substrate;

forming a conductive pattern on said second surface, said conductive pattern including a plurality of contacts adjacent to said one edge of said substrate;

attaching a plurality of microelectronic devices to said substrate and operably coupled to said conductive patterns; and,

attaching two substantially rigid frames extending around the periphery of said dielectric substrate, one on each of said first and second surfaces, said frames having a plurality of metallized castellations aligned with respective contacts on said substrate.

9. The method of claim 8 wherein said rigid frames are attached to said dielectric substrate by adhesive bonding.

10. The method of claim 8 wherein said substrate is extended beyond the castellated edge of said frames.

11. The method of claim 10 further comprising the step of:

passing the castellated edge of said frame through a solder bath to form a solder connection between each of said metallized castellations and its respective contact on said substrate.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 29, 2010
From: FATHI, ZAKARYAE; CLAYTON, JAMES E.
To: MICROELECTRICS ASSEMBLY TECHNOLOGIES, INC.
Reel/Frame 024173/0280 →
Continuity (2)
Provisional Application 6100978100 · Jan 2, 2008
Related Publication 20090168363A1 · Jul 2, 2009