Semiconductor device and temperature sensor structure for a semiconductor device

1. A temperature sensor for a semiconductor device, comprising:

a semiconductor substrate for the semiconductor device including a dissipation region of the semiconductor device being adjacent to a main surface of the semiconductor substrate;

a first layer arrangement disposed on the main surface of the semiconductor substrate above the dissipation region of the semiconductor device;

a second layer arrangement disposed on the first layer arrangement with an insulation layer for galvanic separation therebetween, the first and second layer arrangements and the insulation layer forming a layer structure on the main surface above the dissipation region; and

a temperature sensing element disposed in the second layer arrangement, the temperature sensing element having a temperature-dependent characteristic and being coupled thermally to the dissipation region, wherein the temperature sensing element is configured to provide, in response to electrical excitation, a signal dependent on the temperature of the dissipation region and on the temperature-dependent characteristic.

2. The temperature sensor of claim 1 , wherein the first and/or second layer arrangements comprise a polysilicon material.

3. The temperature sensor of claim 1 , wherein the semiconductor device comprises a power transistor.

4. The temperature sensor of claim 3 , wherein the first layer arrangement forms a control terminal for the power transistor.

5. The temperature sensor of claim 3 , wherein the distance between the temperature sensing element and the dissipation region of the semiconductor device is smaller than the extension of a space charge zone of the power transistor in the semiconductor substrate.

6. The temperature sensor of claim 1 , wherein the semiconductor device comprises a power MOS (Metal Oxide Silicon) field-effect transistor, the layer structure comprising another insulation layer between the semiconductor substrate and the first layer arrangement.

7. The temperature sensor of claim 6 , comprising wherein the first layer arrangement forms a gate terminal for the power MOS field-effect transistor and the another insulation layer is implemented as a gate insulation of the power MOS field-effect transistor.

8. The temperature sensor of claim 1 , wherein the temperature sensing element comprises a resistive element, diode or bipolar transistor.

9. The temperature sensor of claim 1 , comprising wherein the second layer arrangement is formed partly or even completely as the circuit element comprising the temperature-dependent characteristic.

10. A semiconductor device including a temperature sensor comprising:

a semiconductor substrate including a dissipation region of the semiconductor device adjacent to a main surface of the semiconductor substrate;

a first layer arrangement disposed on the main surface of the semiconductor substrate above the dissipation region of the semiconductor device;

a second layer arrangement disposed on the first layer arrangement with an insulation layer for galvanic separation therebetween, the first and second layer arrangements and the insulation layer forming a layer structure on the main surface above the dissipation region; and

a temperature sensing element disposed in the second layer arrangement, the temperature sensing element comprising a temperature-dependent characteristic and being coupled thermally to the dissipation region, wherein the temperature sensing element is configured to provide, in response to electrical excitation, a signal dependent on the temperature of the dissipation region and on the temperature-dependent characteristic.

11. The semiconductor device of claim 10 , wherein the first and/or second layer arrangements comprise a polysilicon material.

12. The semiconductor device of claim 10 , wherein the semiconductor device comprises a power transistor, the first layer arrangement forming a control terminal for the power transistor.

13. The semiconductor device of claim 10 , wherein the semiconductor device comprises a power MOS (Metal Oxide Silicon) field-effect transistor, the layer structure comprising an another insulation layer between the semiconductor substrate and the first layer arrangement, the first layer arrangement forming a gate terminal for the power MOS field-effect transistor, and the another insulation layer being implemented as a gate insulation of the power MOS field-effect transistor.

14. The semiconductor device of claim 10 , wherein the layer structure comprises a thickness in a range of 50 to 500 nm, 100 to 300 nm or in a range of around 250 nm.

15. The semiconductor device of claim 10 , wherein the temperature sensing element comprising the temperature-dependent characteristic comprises a resistive element, diode or bipolar transistor and is implemented to provide, responsive to electrical excitation, a signal depending on the temperature of the dissipation region, corresponding to the temperature-dependent characteristic thereof.

16. The semiconductor device of claim 10 , wherein the second layer arrangement is formed partly or even completely as the circuit element comprising the temperature-dependent characteristic.

17. A semiconductor device including a temperature sensor comprising:

a power transistor, an active region of the power transistor being disposed in the semiconductor substrate adjacent to a main surface of the semiconductor substrate;

a first polysilicon layer being disposed adjacent to the main surface of the semiconductor substrate above the active region of the power transistor, and the first polysilicon layer being effective as a control electrode for the power transistor;

a second polysilicon layer disposed on the first polysilicon layer with an insulation layer for galvanic separation therebetween, the first and second polysilicon layers and the insulation layer forming a layer structure on the main surface above the active region; and

a temperature sensing element disposed in the second polysilicon layer, the temperature sensing element comprising a temperature-dependent characteristic and being coupled thermally to the active region of the power transistor, wherein the temperature sensing element is configured to provide, in response to electrical excitation, a signal depending on the temperature of the dissipation region and the temperature-dependent characteristic.

18. The temperature sensor of claim 17 , wherein the first polysilicon layer is implemented as a gate terminal for the power MOS field-effect transistor, and an another insulation layer being effective as a gate insulation of the power MOS field-effect transistor.

19. The temperature sensor of claim 17 , comprising wherein the circuit element is implemented to provide a signal depending on the temperature of the active region of the power transistor, corresponding to the temperature-dependent characteristic thereof, the temperature sensing element comprising a resistive element, diode or bipolar transistor.

20. The temperature sensor of claim 17 , comprising wherein the second polysilicon layer is implemented partly or even completely as the temperature sensing element comprising the temperature-dependent characteristic.

21. A method comprising:

providing a semiconductor substrate comprising an integrated semiconductor device including a dissipation region of the semiconductor device being adjacent to a main surface of the semiconductor substrate;

applying a first layer arrangement on the main surface of the semiconductor substrate above the dissipation region of the semiconductor device;

applying a second layer arrangement on the first layer arrangement with an insulation layer for galvanic separation therebetween, the first and second layer arrangements and the insulation layer forming a layer structure on the main surface above the dissipation region of the semiconductor device; and

arranging in the second layer arrangement a temperature sensing element comprising a temperature-dependent characteristic and being coupled thermally to the dissipation region.

22. The method of claim 21 , wherein the first and/or second layer arrangements comprise a polysilicon material.

23. The method of claim 21 , wherein the semiconductor device comprises a power transistor, further comprising:

implementing the first layer arrangement as a control terminal for the power transistor.

24. The method of claim 21 , wherein the semiconductor device is implemented as a power MOS field-effect transistor, further comprising:

applying a further insulation layer between the first layer arrangement and the semiconductor substrate before applying the first layer arrangement.

25. The method of claim 21 , comprising arranging the temperature sensing element in the second layer arrangement such that the second layer arrangement partly or even completely forms the temperature sensing element comprising the temperature-dependent characteristic.

26. A method for manufacturing a semiconductor device comprising an integrated temperature sensor above a dissipation region of the semiconductor device, comprising:

providing a semiconductor substrate comprising the integrated semiconductor device, including a dissipation region of the semiconductor device being adjacent to a main surface of the semiconductor substrate;

applying a first layer arrangement on the semiconductor device, the first layer arrangement being on a main surface of the semiconductor substrate above the dissipation region of the semiconductor device;

applying a second layer arrangement on the first layer arrangement with an insulation layer for galvanic separation therebetween, the first and second layer arrangements and the insulation layer forming a layer structure on the main surface above the dissipation region of the semiconductor device; and

arranging a temperature sensing element comprising a temperature-dependent characteristic and being coupled thermally to the dissipation region, in the second layer arrangement.