IP Library › Granted Patent US 7,847,630
Granted Patent B2
US 7,847,630 · App. 11/255,874 · Granted Dec 7, 2010

Amplifier

Assignee: Hitachi Kokusai Electric Inc.
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Quick Facts
Patent No.
US 7,847,630
App. No.
11/255,874
Granted
Dec 7, 2010
Kind
B2
Abstract

There is provided an amplifier for combining outputs of a plurality of amplifying circuits to generate an amplifier output. The amplifier includes a first amplifying circuit for operating a first amplifying device in class-AB, wherein the first amplifying circuit is one among the plurality of the amplifying circuits; a second amplifying circuit for operating a second amplifying device in class-B or class-C, wherein the second amplifying circuit is one among the plurality of the amplifying circuits; and a summing node at which an output of the first amplifying circuit is combined with an output of the second amplifying circuit via a first impedance transformer containing a transmission line of an electrical length other than λ/4. The second amplifying device is connected to the summing node via an output matching circuit and a second impedance transformer containing a transmission line.

Claims (20)

1. A Doherty amplifier for combining outputs of a plurality of amplifying circuits to generate an amplifier output, comprising:

a first amplifying circuit for operating a first amplifying device in class-AB, wherein the first amplifying circuit is one among the plurality of the amplifying circuits, and the first amplifying circuit includes an output matching circuit at an output side thereof;

a second amplifying circuit for operating a second amplifying device in class-B or class-C, wherein the second amplifying circuit is one among the plurality of the amplifying circuits; and

a summing node at which an output of the first amplifying circuit is combined with an output of the second amplifying circuit via a first impedance transformer containing a transmission line and the impedance transformer is other than a multiple of λ/4,

wherein when a load impedance value of the output matching circuit is substantially equal to an impedance value of the first impedance transformer, an output power of the output matching circuit is a maximum power of the first amplifying circuit, and

wherein an electrical length of the transmission line is adjusted so that an amplifying efficiency of the first amplifying circuit is maximum within an input level region where the first amplifying circuit operates alone and

wherein between a second output matching circuit of the second amplifying circuit and the summing node is a straight line.

2. A Doherty amplifier for combining outputs of a plurality of amplifying circuits to generate an amplifier output, comprising:

a first amplifying circuit for operating a first amplifying device in class-AB, wherein the first amplifying circuit is one among the plurality of the amplifying circuits, and the first amplifying circuit includes an output matching circuit at an output side thereof;

a second amplifying circuit for operating a second amplifying device in class-B or class-C, wherein the second amplifying circuit is one among the plurality of the amplifying circuits; and

a summing node at which an output of the first amplifying circuit is combined with an output of the second amplifying circuit via a first impedance transformer containing a transmission line and the impedance transformer is other than a multiple of λ/4,

a λ/4 transformer which transforms an input impedance of the λ/4 transformer seen from the summing node into an output load impedance,

wherein an impedance value of the first impedance transformer is twice an impedance value of the λ/4 transformer seen from the summing node,

wherein when a load impedance value of the output matching circuit is substantially equal to an impedance value of the first impedance transformer, an output power of the output matching circuit is a maximum power of the first amplifying circuit, and

wherein an electrical length of the transmission line is adjusted so that an amplifying efficiency of the first amplifying circuit is maximum within an input level region where the first amplifying circuit operates alone and

wherein between a second output matching circuit of the second amplifying circuit and the summing node is a straight line.

3. A Doherty amplifier of claim 1 further comprising:

a divider for dividing an input signal of the Doherty amplifier into a plurality of divided signals which include a first and a second divided signals for the first and the second amplifying circuits.

4. A Doherty amplifier of claim 2 further comprising:

a divider for dividing an input signal of the Doherty amplifier into a plurality of divided signals which include a first and a second divided signals for the first and the second amplifying circuits.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 24, 2005
From: OKUBO, YOICHI; SUTO, MASAKI; TAKEDA, YASUHIRO; ADACHI, MASARU
To: HITACHI KOKUSAI ELECTRIC INC.
Reel/Frame 017133/0391 →
Priority Claims (2)
JP 2004-322092 · Nov 5, 2004 · national
JP 2004-362826 · Dec 15, 2004 · national
Continuity (1)
Related Publication 20060097783A1 · May 11, 2006