Electrostatic discharge protection circuit and semiconductor device
An electrostatic discharge protection circuit and a semiconductor device that prevent the breakdown of a semiconductor device caused by an electrostatic discharge (ESD) which suddenly changes. When voltage which is far higher than VDD 1 is applied to a power supply line as a result of an ESD, a great electric potential difference is produced between VDD 1 and VSS. At this time an electric current path for making an electric charge generated by overvoltage flow to a grounding line is formed by a clamp circuit. As a result, an electric current flows into GND of a circuit block. This prevents the production of a great electric potential difference between VDD 1 and VSS. In addition, at this time a rapid change in the level of the overvoltage applied to a signal line is suppressed by a protection circuit. This prevents the dielectric breakdown of gate oxide films of transistors included in a circuit block which receives a control signal.
1. A semiconductor device, comprising:
a first circuit block provided between a first power supply line and a second power supply line, a first power supply voltage supplied from the first power supply line being higher than a second power supply voltage supplied from the second power supply line; and
a second circuit block provided between the second power supply line and a third power supply line, a third power supply voltage supplied from the third power supply line being different from the first power supply voltage,
wherein the second circuit block includes:
a second clamp circuit to clamp an overvoltage by forming an electric current path between the second power supply line and the third power supply line; and
a circuit provided between the second power supply voltage line and the third power supply voltage line,
wherein the first circuit block includes:
a first clamp circuit to clamp the overvoltage by forming an electric current path between the first power supply line and the second power supply line; and
a first protection circuit that is located on a signal line through which a predetermined signal is sent from the first power supply line to the circuit in the second circuit block,
wherein the first protection circuit includes a buffer circuit, an input of which being coupled to the first power supply line.
2. The semiconductor device according to claim 1 , wherein the first protection circuit reduces a change in a signal level of the signal line caused by an electrostatic discharge generated by a electric charge flow.
3. The semiconductor device according to claim 1 , wherein the first protection circuit reduces a signal level of the signal line which is increased by the overvoltage generated due to the electrostatic discharge.
4. The electrostatic discharge protection circuit according to claim 1 , wherein the clamp circuit clamps the overvoltage by forming an electric current path when the overvoltage is applied to the first power supply line in one of circuit blocks which belong to different power supply systems.
5. The electrostatic discharge protection circuit according to claim 1 , wherein the second power supply line is a ground line.