Configurable ASIC for use with a programmable I/O module
View Patent ↗An application-specific integrated circuit (ASIC) for use with a programmable I/O module includes programmable circuitry that enables the ASIC to be configured to support various different I/O functions. The ASIC includes a pin interface, a data interface, a digital section, and an analog section. The pin interface supports analog and digital signal communication and the data interface supports digital data communication. The digital section includes registers for storing digital data such as configuration commands, signal control commands, and digital signal information. The analog section is in electrical signal communication with pin interface and digital data communication with the registers. The analog section includes multiple function-specific elements for processing an electrical signal that is communicated via the pin interface such that the analog section can be configured to establish one of multiple different function-specific processing paths in response to a configuration command received via the data interface.
1. An application-specific integrated circuit for interfacing with an I/O device, the application-specific integrated circuit comprising:
a pin interface for electrical signal communication;
a data interface for digital data communication;
a digital section in data communication with the data interface, the digital section comprising registers for storing digital data; and
an analog section in electrical signal communication with the pin interface and digital data communication with the registers of the digital section, the analog section comprising multiple function-specific elements for processing an electrical signal that is communicated via the pin interface and a differential signaling element configured to convert a differential signal to a single-ended format, wherein one component of the differential signal is received on the pin interface and the other component of the differential signal is received via a matrix switch interface, wherein the analog section can be configured to establish one of multiple different function-specific processing paths in response to a configuration command received via the data interface.
2. The application-specific integrated circuit of claim 1 wherein the multiple different function-specific processing paths comprise:
first function-specific processing path configured to utilize a first subset of the function-specific elements to generate an electrical signal for output via the pin interface in response to digital data received via the data interface; and
a second function-specific processing path configured to utilize a second subset of the function-specific elements to generate digital data for output via the data interface in response to an electrical signal received via the pin interface.
3. The application-specific integrated circuit of claim 1 wherein the analog section comprises:
a power supply module that includes analog circuit elements for supplying power via the pin interface;
an output module that includes analog circuit elements for providing an output signal to the pin interface; and
an input module that includes analog circuit elements for converting an input signal received via the pin interface to digital data.
4. The application-specific integrated circuit of claim 3 wherein the analog section further comprises a serial input/output module that includes analog circuit elements for processing a serial signal.
5. The application-specific integrated circuit of claim 1 further comprising a power supply and ground circuit that is configured to function as a power supply or as a ground in response to a digital power control command from the digital section.
6. The application-specific integrated circuit of claim 1 wherein the analog section comprises a power supply circuit that is configured to provide a selectable supply voltage to the pin interface, wherein the supply voltage is selected in response to a digital power control command from the digital section.
7. The application-specific integrated circuit of claim 6 wherein the analog section further comprises a current limit circuit and a digital-to-analog converter (DAC), wherein the current limit circuit is configured to limit the current sourcing of the selectable supply voltage, wherein the current limit of the current limit circuit is set in response to an analog current limit signal from the DAC, wherein the analog current limit signal is generated in response to a digital current limit command from the digital section.
8. The application-specific integrated circuit of claim 6 wherein the analog section further comprises a current sense circuit and an analog-to-digital converter (ADC), wherein the current sense circuit is configured to sense the current being supplied to the pin interface, wherein the sensed value, in voltage equivalent, is provided to the ADC for conversion to digital current data.
9. The application-specific integrated circuit of claim 6 further comprising a fault detection element configured to detect a fault condition at the pin interface.
10. The application-specific integrated circuit of claim 1 wherein the analog section comprises a digital-to-analog converter (DAC), wherein the output of the DAC is set in response to a digital voltage control command from the digital section.
11. The application-specific integrated circuit of claim 10 wherein the analog section further comprises a variable gain amplifier that scales the output of the DAC in response to a digital gain control command from the digital section.
12. The application-specific integrated circuit of claim 11 wherein the analog section further comprises a switch element, a second variable gain amplifier, and an analog-to-digital converter (ADC), wherein the switch element is configured to provide the output of the DAC to the second variable gain amplifier and then to the ADC for conversion to digital voltage data.
13. The application-specific integrated circuit of claim 12 wherein the analog section further comprises a second variable gain amplifier and an analog-to-digital converter (ADC), wherein the second variable gain amplifier is configured to provide the output current, in voltage equivalent, to the ADC for conversion to digital current data.
14. The application-specific integrated circuit of claim 10 wherein the analog section further comprises a current sense circuit configured to convert the output voltage to an output current.
15. The application-specific integrated circuit of claim 1 wherein the analog section comprises an analog-to-digital converter (ADC) that converts an analog signal received via the pin interface to digital data.
16. The application-specific integrated circuit of claim 15 wherein the analog section further comprises a variable gain amplifier that scales the received analog signal in response to a digital gain control command.
17. The application-specific integrated circuit of claim 1 wherein the analog section comprises a switch element, a matrix switch, a variable gain amplifier, a low pass filter, and an analog-to-digital converter configured to convert analog voltage and current to digital data.
18. The application-specific integrated circuit of claim 1 wherein the analog section comprises a matrix switch that is configured in response to a digital matrix switch configuration command from the digital section.
19. The application-specific integrated circuit of claim 1 wherein the analog section comprises a comparator for comparing an electrical signal received via the pin interface to a threshold value to determine a logic high or logic low.
20. The application-specific integrated circuit of claim 19 wherein the threshold value is set in response to a digital threshold command from the digital section.
21. The application-specific integrated circuit of claim 1 wherein the analog section comprises a level shifter element configured to perform voltage conversion.
22. An application-specific integrated circuit for interfacing with an I/O device, the application-specific integrated circuit comprising:
a pin interface for electrical signal communication;
a data interface for digital data communication;
a digital section in data communication with the data interface, the digital section comprising registers for storing digital data;
an analog section in electrical signal communication with the pin interface, the analog section comprising multiple function-specific circuits for processing an electrical signal that is communicated via the pin interface and a differential signaling element configured to convert a differential signal to a single-ended format, wherein one component of the differential signal is received on the pin interface and the other component of the differential signal is received via a matrix switch interface, wherein the function-specific circuits can be programmed into one of multiple different function-specific configurations in response to a configuration command received via the data interface.
23. An application-specific integrated circuit for interfacing with an I/O device, the application-specific integrated circuit comprising:
a pin interface for electrical signal communication;
a data interface for digital data communication;
a digital section in data communication with the data interface, the digital section comprising registers for storing digital data; and
an analog section in electrical signal communication with the pin interface and digital data communication with the registers of the digital section, the analog section comprising multiple function-specific elements for processing an electrical signal that is communicated via the pin interface, wherein the analog section can be configured to establish one of multiple different function-specific processing paths in response to a configuration command received via the data interface, wherein the analog section comprises:
a power supply module that includes a programmable power supply and ground circuit configured to supply power via the pin interface in response to a digital power control command from the digital section;
a programmable output module that includes a digital-to-analog converter configured to provide an output signal to the pin interface in response to digital data from the digital section;
a current limit circuit configured to limit a current sourced from a supply voltage, wherein the current limit circuit is set in response to an analog current limit signal from the DAC, the analog current limit signal generated in response to a digital current limit command from the digital section; and
a programmable input module that includes an analog-to-digital converter configured to convert an analog input signal received via the pin interface to digital data.