To provide a display device including a protection circuit having a thin film transistor which has small size and high withstand voltage. In the protection circuit of the display device, a thin film transistor is used in which an amorphous semiconductor layer, a microcrystalline semiconductor layer, a gate insulating layer which is in contact with the microcrystalline semiconductor layer, and a gate electrode layer overlap with each other. Since current drive capability of the microcrystalline semiconductor layer is high, the size of the transistor can be made small. In addition, the amorphous semiconductor layer is included, so that the withstand voltage can be improved. Here, the display device is a liquid crystal display device or a light-emitting device.
1. A display device comprising:
an input terminal;
a pixel portion; and
a protection circuit including at least a thin film transistor between the input terminal and the pixel portion;
wherein the thin film transistor includes:
a gate electrode;
a gate insulating layer covering the gate electrode;
a microcrystalline semiconductor layer over the gate insulating layer;
a buffer layer over the microcrystalline semiconductor layer;
a source region and a drain region over the buffer layer;
a source electrode being in contact with the source region; and
a drain electrode being in contact with the drain region,
wherein regions of the buffer layer overlapping with the source region and the drain region are thicker than a region of the buffer layer overlapping with a channel formation region,
wherein a protective insulating layer, including a first opening portion and a second opening portion is provided over the source electrode and the drain electrode,
wherein the first opening portion is provided so as to reach one of the source electrode and the drain electrode,
wherein the second opening portion is provided so as to reach the gate electrode, and
wherein an electrode connecting the first opening portion and the second opening portion is provided over the protective insulating layer.
2. The display device according to claim 1 , wherein the buffer layer is an amorphous semiconductor layer.
3. The display device according to claim 2 , wherein the amorphous semiconductor layer includes nitrogen.
4. The display device according to claim 2 , wherein the amorphous semiconductor layer includes hydrogen.
5. The display device according to claim 2 , wherein the amorphous semiconductor layer includes at least one of fluorine, chlorine, and iodine.
6. The display device according to claim 1 , wherein end portions of the source region and the drain region are almost aligned with a depression portion of the buffer layer.
7. The display device according to claim 1 , wherein the display device is a liquid crystal display device including a liquid crystal element.
8. The display device according to claim 1 , wherein the display device is a light-emitting device including a light-emitting element.
9. A display device comprising:
an input terminal;
a pixel portion; and
a protection circuit including at least a thin film transistor between the input terminal and the pixel portion,
wherein the thin film transistor includes:
a first conductive layer;
a first insulating layer covering the first conductive layer;
a microcrystalline semiconductor layer over the first insulating layer;
an amorphous semiconductor layer over the microcrystalline semiconductor layer;
a first impurity semiconductor layer and a second impurity semiconductor layer over the microcrystalline semiconductor layer;
a second conductive layer being in contact with the first impurity semiconductor layer; and
a third conductive layer being in contact with the second impurity semiconductor layer,
wherein regions of the amorphous semiconductor layer overlapping with the first impurity semiconductor layer and the second impurity semiconductor layer are thicker than a region of the amorphous semiconductor layer overlapping with a channel formation region,
wherein a second insulating layer including a first opening portion and a second opening portion is provided over the second conductive layer and the third conductive layer,
wherein the first opening portion is provided so as to reach the second conductive layer,
wherein the second opening portion is provided so as to reach the first conductive layer and the third conductive layer, and
wherein a fourth conductive layer connecting the first opening portion and the second opening portion is provided over the second insulating layer.
10. The display device according to claim 9 , wherein the amorphous semiconductor layer includes nitrogen.
11. The display device according to claim 9 , wherein the amorphous semiconductor layer includes hydrogen.
12. The display device according to claim 9 , wherein the amorphous semiconductor layer includes at least one of fluorine, chlorine, and iodine.
13. The display device according to claim 9 , wherein end portions of the first impurity semiconductor layer and the second impurity semiconductor layer are almost aligned with a depression portion of the amorphous semiconductor layer.
14. The display device according to claim 9 , wherein the display device is a liquid crystal display device including a liquid crystal element.
15. The display device according to claim 9 , wherein the display device is a light-emitting device including a light-emitting element.
16. A display device comprising:
an input terminal;
a pixel portion; and
a protection circuit including at least a thin film transistor between the input terminal and the pixel portion;
wherein the thin film transistor includes:
a gate electrode;
a gate insulating layer covering the gate electrode;
a microcrystalline silicon layer over the gate insulating layer;
a buffer layer over the microcrystalline silicon layer;
a source region and a drain region over the buffer layer;
a source electrode being in contact with the source region; and
a drain electrode being in contact with the drain region,
wherein regions of the buffer layer overlapping with the source region and the drain region are thicker than a region of the buffer layer overlapping with a channel formation region,
wherein a protective insulating layer including a first opening portion and a second opening portion is provided over the source electrode and the drain electrode,
wherein the first opening portion is provided so as to reach one of the source electrode and the drain electrode,
wherein the second opening portion is provided so as to reach the gate electrode, and
wherein an electrode connecting the first opening portion and the second opening portion is provided over the protective insulating layer.
17. The display device according to claim 16 , wherein the buffer layer is an amorphous semiconductor layer.
18. The display device according to claim 17 , wherein the amorphous semiconductor layer includes nitrogen.
19. The display device according to claim 17 , wherein the amorphous semiconductor layer includes hydrogen.
20. The display device according to claim 17 , wherein the amorphous semiconductor layer includes at least one of fluorine, chlorine, and iodine.
21. The display device according to claim 16 , wherein end portions of the source region and the drain region are almost aligned with a depression portion of the buffer layer.
22. The display device according to claim 16 , wherein the display device is a liquid crystal display device including a liquid crystal element.
23. The display device according to claim 16 , wherein the display device is a light-emitting device including a light-emitting element.