IP Library Granted Patent US 7,908,471
Granted Patent B2
US 7,908,471 · App. 12/128,625 · Granted Mar 15, 2011

Host peripheral system and method for loading an external program code to a host for setting up a transmission mechanism when booting

Assignee: JMicron Technology Corp.
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Quick Facts
Patent No.
US 7,908,471
App. No.
12/128,625
Granted
Mar 15, 2011
Kind
B2
Abstract

When booting a host, a host peripheral system sends a boot code to the host for controlling the booting operation of the host via a serial transmission line, and loads an external program code into the host. After setting up a transmission mechanism through executing the external program code, the host can forward a write command to the host peripheral system for writing the data provided by the external program code to the command identification sector of the non-volatile memory of the host peripheral system, and the host peripheral system is capable of identifying the data as a command and executes functional operations corresponding to the command. After finishing the functional operations, the host peripheral system forwards a finish signal to the host, and the host is able to send a read command for fetching the data signal generated in the functional operations.

Claims (47)

1. A host peripheral system capable of loading an external program code into a host for setting up a transmission mechanism when booting, comprising:

a host serial transmission line coupled to a host serial interface port of the host;

a device serial interface port coupled to the host serial interface port of the host via the host serial transmission line;

an integrated circuit device coupled to the device serial interface port; and

a non-volatile memory coupled to the integrated circuit device, the non-volatile memory comprising a program memory block for storing the external program code, a command identification sector, and a boot sector for storing a boot code;

wherein write data transferred from the host to the host peripheral system is identified as a command executable by the integrated circuit device when the host sends a write command for writing the write data provided by the external program code into the command identification sector.

2. The host peripheral system of claim 1 , further comprising a plurality of serial interface ports coupled to the integrated circuit device.

3. The host peripheral system of claim 2 , wherein each of the serial interface ports is a universal serial bus interface port, a serial advanced technology attachment interface port, or a serial attached small computer system interface port.

4. The host peripheral system of claim 2 , further comprising:

a plurality of device serial transmission lines, each of the device serial transmission lines being coupled to a corresponding serial interface port of the serial interface ports; and

a plurality of functional devices, each of the functional devices comprising a functional device serial interface port coupled to a corresponding device serial transmission line of the device serial transmission lines.

5. The host peripheral system of claim 4 , wherein each of the device serial transmission lines is a universal serial bus interface transmission line, a serial advanced technology attachment interface transmission line, or a serial attached small computer system interface transmission line.

6. The host peripheral system of claim 4 , wherein the functional device serial interface port is a universal serial bus interface port, a serial advanced technology attachment interface port, or a serial attached small computer system interface port.

7. The host peripheral system of claim 1 , wherein the host serial transmission line is a universal serial bus interface transmission line, a serial advanced technology attachment interface transmission line, or a serial attached small computer system interface transmission line.

8. The host peripheral system of claim 1 , wherein the device serial interface port is a universal serial bus interface port, a serial advanced technology attachment interface port, or a serial attached small computer system interface port.

9. The host peripheral system of claim 1 , wherein the host serial interface port of the host is a universal serial bus interface port, a serial advanced technology attachment interface port, or a serial attached small computer system interface port.

10. The host peripheral system of claim 1 , wherein the integrated circuit device is a System-on-Chip (SoC).

11. The host peripheral system of claim 1 , wherein the integrated circuit device is a signal processor.

12. The host peripheral system of claim 1 , wherein the non-volatile memory is integrated into the integrated circuit device.

13. The host peripheral system of claim 1 , wherein the non-volatile memory is a read only memory (ROM).

14. The host peripheral system of claim 1 , wherein the non-volatile memory is a flash memory.

15. A method for loading an external program code into a host for setting up a transmission mechanism when booting, comprising:

coupling an integrated circuit device of a host peripheral system and the host by making use of a host serial transmission line;

the host selecting the integrated circuit device as a boot device;

the integrated circuit device sending a boot code stored in a non-volatile memory of the host peripheral system to the host;

the host performing a booting operation based on the boot code;

the host loading the external program code stored in the non-volatile memory of the host peripheral system based on the boot code;

the host executing the external program code for setting up the transmission mechanism between the host and the host peripheral system;

the host sending a write command to the integrated circuit device for writing related write data to a command identification sector of the non-volatile memory based on the transmission mechanism; and

the integrated circuit device identifying the related write data as a command executable by the integrated circuit device.

16. The method of claim 15 , further comprising:

powering the host and the host peripheral system before the host selecting the integrated circuit device as the boot device.

17. The method of claim 15 , further comprising:

the host detecting bootable devices attached to the host before the host selecting the integrated circuit device as the boot device.

18. The method of claim 15 , further comprising:

the integrated circuit device executing a functional operation corresponding to the command after the integrated circuit device identifying the related write data as the command executable by the integrated circuit device.

19. The method of claim 18 , further comprising:

the host sending a read command to the integrated circuit device after the integrated circuit device executing the functional operation corresponding to the command; and

the integrated circuit device forwarding a data signal generated in the functional operation to the host after the host sending the read command to the integrated circuit device.

20. The method of claim 18 , further comprising:

the integrated circuit device forwarding a finish signal to the host after the integrated circuit device executing the functional operation corresponding to the command.

21. The method of claim 15 , further comprising:

the integrated circuit device performing functional operations corresponding to the command over a plurality of functional devices after the integrated circuit device identifying the related write data as the command executable by the integrated circuit device.

22. The method of claim 15 , further comprising:

the host loading an initial program code of a basic input/output system stored in a read only memory into a main memory and performing a process of power-on self test before the host selecting the integrated circuit device as the boot device.

23. The method of claim 15 , wherein the integrated circuit device sending the boot code stored in the non-volatile memory of the host peripheral system to the host is the integrated circuit device sending the boot code stored in a boot sector of the non-volatile memory of the host peripheral system to the host.

24. The method of claim 15 , wherein the host sending the write command to the integrated circuit device for writing the related write data to the command identification sector of the non-volatile memory based on the transmission mechanism is the host sending the write command to the integrated circuit device for writing the related write data provided by the external program code to the command identification sector of the non-volatile memory based on the transmission mechanism.

Assignments (3)
CHANGE OF NAME Recorded Jul 18, 2022
From: MAXIO TECHNOLOGY (HANGZHOU) LTD.
To: MAXIO TECHNOLOGY (HANGZHOU) CO., LTD.
Reel/Frame 060714/0986 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 29, 2016
From: JMICRON TECHNOLOGY CORP.
To: MAXIO TECHNOLOGY (HANGZHOU) LTD.
Reel/Frame 040791/0949 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2008
From: SUN, ZHI-MING
To: JMICRON TECHNOLOGY CORP.
Reel/Frame 021011/0440 →
Priority Claims (1)
TW 97112182 A · Apr 3, 2008 · national
Continuity (1)
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