IP Library Granted Patent US 7,910,426
Granted Patent B2
US 7,910,426 · App. 11/124,254 · Granted Mar 22, 2011

Pixel and imager device having high-k dielectrics in isolation structures

Assignee: Micron Technology, Inc.
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Quick Facts
Patent No.
US 7,910,426
App. No.
11/124,254
Granted
Mar 22, 2011
Kind
B2
Abstract

An imager device that has an isolation structure such that pinned photodiode characteristics are maintained without increasing doping levels. The invention provides an isolation structure to maintain pinned photodiode characteristics without increasing doping levels around the photodiode. By creating a substrate region surrounding the charge-collection region of the photodiode, the photodiode may be electrically isolated from the bulk substrate. This region fixes the depletion region so that it does not migrate toward the surface of the substrate or the STI region. By doing so, the region prevents charge from being depleted from the substrate and the accumulation region, reducing dark current.

Claims (55)

1. A method of forming a pixel cell comprising:

forming an isolation trench having a bottom and sidewalls in a p-type substrate;

forming a layer of silicon dioxide on said bottom and sidewalls of said isolation trench;

forming a layer of aluminum oxide on said bottom and sidewalls of said isolation trench;

forming a buried photodiode in said substrate adjacent to said isolation trench;

forming a second silicon dioxide layer on a surface of said substrate over said buried photodiode and said isolation trench; and

forming a high-k dielectric layer over said photodiode and said isolation trench.

2. The method of claim 1 , further comprising the step of removing the second silicon dioxide layer over said surface of said isolation trench and said photodiode before forming said high-k dielectric layer.

3. The method of claim 2 , further comprising removing said silicon dioxide layer before forming said aluminum oxide layer.

4. The method of claim 1 , further comprising the step of filling said isolation trench with a dielectric insulating material.

5. A method of forming a pixel cell comprising:

forming an isolation trench having a bottom and sidewalls in a p-type substrate;

forming a charge collection region adjacent to said isolation trench in said substrate;

forming a first accumulation region around said isolation trench by forming a high-k dielectric material on said bottom and said sidewalls of said isolation trench, wherein said first accumulation region has an electric field near said isolation trench; and

forming a second accumulation region between said charge collection region and a top surface of said substrate by forming a layer of aluminum oxide over said substrate surface, wherein said second accumulation region has another electric field near said substrate surface.

6. The method of claim 5 , wherein the steps of forming said first and second accumulation regions include depositing a silicon dioxide layer over said sidewalls and said bottom of said isolation trench, and over said substrate surface, before forming said first and second accumulation regions.

7. The method of claim 6 , wherein the step of forming a first accumulation region includes removing said silicon dioxide layer deposited over said sidewalls and said bottom of said isolation trench before forming said first accumulation region.

8. The method of claim 6 , wherein the step of forming a second accumulation region includes removing said silicon dioxide layer over said substrate surface before forming said second accumulation region.

9. The method of claim 6 , wherein the step of forming a first accumulation region includes removing said silicon dioxide layer over said sidewalls and said bottom of said isolation trench before forming said first accumulation region, and the step of forming a second accumulation region includes removing said silicon dioxide layer over said substrate surface before forming said first accumulation region.

10. The method of claim 5 , further comprising the step of filling said isolation trench with a dielectric insulating material.

11. A method of forming a pixel cell comprising:

forming a trench having a bottom and sidewalls in a p-type substrate;

forming an aluminum oxide layer over said bottom and sidewalls of said trench;

filling said trench with a dielectric material;

forming an n-type charge-collection region in said substrate;

forming a p-type accumulation region over said n-type charge-collection region and adjacent to said trench in said p-type substrate, wherein the entire p-type accumulation region is formed outside of said trench in said p-type substrate; and

forming a high-k dielectric layer above said p-type accumulation region over a top surface of said p-type substrate.

12. The method of claim 11 , wherein the dielectric material comprises aluminum oxide.

13. The method of claim 11 , wherein said aluminum oxide layer induces hole-accumulation in said p-type accumulation region adjacent to said trench.

14. The method of claim 11 , wherein said high-k dielectric layer induces hole-accumulation in said p-type accumulation region above said n-type charge-collection region.

15. The method of claim 11 , wherein the dielectric material comprises silicon nitride.

16. The method of claim 11 , further comprising the step of forming a silicon dioxide layer over said substrate after forming said trench and before forming said high-k dielectric layer.

17. The method of claim 16 , further comprising the step of removing said silicon dioxide layer before forming said high-k dielectric layer.

18. The method of claim 11 , further comprising forming a silicon dioxide layer between said aluminum oxide layer and said bottom and said sidewalls of said trench.

19. The method of claim 18 , further comprising removing the silicon dioxide layer between said aluminum oxide layer and said bottom and said sidewalls of said trench.

20. A method of forming a pixel cell comprising:

forming an isolation trench having a bottom and sidewalls in a p-type substrate;

forming a layer of silicon dioxide on said bottom and sidewalls of said isolation trench;

forming a layer of aluminum oxide on said bottom and said sidewalls of said isolation trench;

forming a photodiode in said substrate adjacent to said isolation trench;

forming a second layer of silicon dioxide on a surface of said substrate over said photodiode and said isolation trench; and

forming a second layer of aluminum oxide over said substrate surface and said isolation trench.

21. The method of claim 20 , further comprising a step of filling said isolation trench with aluminum oxide before said step of forming a second layer of silicon dioxide on a surface of said substrate over said photodiode and said isolation trench.

22. The method of claim 20 , further comprising a step of removing said second layer of silicon dioxide before said step of forming a second layer of aluminum oxide.

23. A method of forming a pixel cell comprising:

forming an isolation trench in a substrate;

forming at least a first high-k dielectric material on the sidewalls and bottom of said isolation trench to supply excess charge to said sidewalls and bottom of said trench;

forming a buried photodiode in said substrate adjacent to said isolation trench; and

forming a second high-k dielectric material over said trench and said photodiode to supply excess charge to a region above the photodiode, said excess charge at the sidewalls and bottom of said trench, and said excess charge at said region above said photodiode together being sufficient to inhibit electrical connection between the photodiode and substrate.

24. The method of claim 23 , further comprising the step of forming a silicon dioxide material over said sidewalls and bottom of said trench, and forming a silicon dioxide material over said trench and said photodiode, before forming said first and second high-k dielectric materials.

25. The method of claim 24 , further comprising removing said silicon dioxide material formed over said sidewalls and bottom of said trench, and removing said silicon dioxide material over said trench and said photodiode.

26. The method of claim 23 , wherein said first and second high-k dielectric materials are selected from the group consisting of aluminum oxide, aluminum nitride, and aluminum silicates.

27. The method of claim 23 , further comprising the step of filling said isolation trench with a dielectric insulating material.

28. The method of claim 23 , wherein said first high-k dielectric material induces hole-accumulation at said sidewalls and bottom of said trench, and said second high-k dielectric material induces hole-accumulation over said trench and said photodiode.

29. The method of claim 23 , wherein said second high-k dielectric material induces an electron-rich accumulation region over said trench and said photodiode, and said first high-k dielectric material induces an electron-rich accumulation region over said sidewalls and bottom of said trench.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 17, 2016
From: MICRON TECHNOLOGY, INC.
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 038144/0969 →
Continuity (2)
Division 10754565 · Jan 12, 2004
Related Publication 20050202584A1 · Sep 15, 2005