Video receiver with reduced power mode
An integrated circuit device having a television signal tuner, video decoder and power control circuit. The television signal tuner selects one of a plurality of television channels, and the video decoder converts a television signal conveyed in the selected television channel into a video display signal. The power control circuit alternately enables and disables the television tuner to enable reception of a first portion of video information conveyed in the television signal and to disable reception of a second portion of the video information.
1. An integrated circuit device comprising:
a tuner to select one of a plurality of television channels;
a decoder to convert a television signal conveyed in the one of the plurality of television channels into a video display signal; and
a power control circuit to alternately enable and disable the tuner at least once for each video frame conveyed in the television signal to enable reception of a first portion of video information conveyed in the television signal and to disable reception of a second portion of the video information.
2. The integrated circuit device of claim 1 wherein the video information conveyed in the television signal comprises a plurality of scanlines, and wherein the first portion of the video information includes a first subset of the plurality of scanlines, and the second portion of the video information includes a second subset of the plurality of scanlines.
3. The integrated circuit device of claim 2 wherein the first subset of the plurality of scanlines corresponds to a number of scanlines of a display that is to receive the video display signal.
4. The integrated circuit device of claim 2 wherein the second subset of the plurality of scanlines comprises every N th scanline of the plurality of scanlines, where N is an integer greater than one.
5. The integrated circuit device of claim 1 wherein each of the video frames conveyed in the television signal includes at least two video fields, and wherein the second portion of the video information comprises one of the at least two video fields in each of the video frames.
6. The integrated circuit device of claim 1 wherein the power control circuit is configured to alternately enable and disable the decoder.
7. The integrated circuit device of claim 1 wherein the tuner comprises an amplifier and a synchronous detector each configured to transition to a low-power disabled mode in response to a disable signal from the power control circuit.
8. The integrated circuit device of claim 7 wherein the amplifier is switched to a non-powered state in response to assertion of the disable signal.
9. A method of operating a video device, the method comprising:
cycling a video receiver between a signal reception mode and a low-power mode during each frame of an incoming analog video signal; and
receiving a portion of each frame of the analog video signal when in signal reception mode, and disabling reception of the analog video signal when in the low-power mode.
10. The method of claim 9 wherein receiving a portion of each frame of the analog video signal comprises receiving a first video field within each frame of the analog video signal.
11. The method of claim 10 wherein disabling reception of the analog video signal when in the low power mode comprises disabling reception of the analog video signal over an interval in which scanlines of a second video field would otherwise be received.
12. The method of claim 9 wherein receiving a portion of each frame of the analog video signal comprises receiving a first portion of scanlines of a first video field within each frame of the analog video signal.
13. The method of claim 12 wherein disabling reception of the analog video signal when in the low power mode comprises disabling reception of the analog video signal over an interval in which a second portion of scanlines of the first video field would otherwise be received.
14. The method of claim 12 further comprising storing, within a configuration circuit of the video device, a value that indicates the number of scanlines included within the first portion of scanlines.
15. The method of claim 14 wherein storing the value that indicates the number of scanlines included within the first portion of scanlines comprises storing the value within a programmable register within an integrated circuit.
16. The method of claim 9 wherein cycling a video receiver between a signal reception mode and a low-power mode during each frame of an incoming signal comprises transitioning the video receiver from the signal reception mode to the low power mode at least once during each frame of the incoming analog video signal.
17. A method of operating a video device, the method comprising:
cycling a video receiver between a signal reception mode and a low-power mode during each frame of an incoming analog video signal;
wherein cycling a video receiver between a signal reception mode and a low-power mode during each frame of an incoming signal comprises enabling signal reception within a tuner circuit of the video receiver when in the signal reception mode and disabling signal reception within the tuner circuit when in the low-power mode.
18. The method of claim 17 wherein the tuner circuit comprises an amplifier and a synchronous detector, and wherein disabling signal reception within the tuner circuit when in the low-power mode comprises disabling operation of at least one of the amplifier and the synchronous detector.
19. An integrated circuit device comprising:
means for selecting one of a plurality of television channels;
means for converting a television signal conveyed in the one of the plurality of television channels into a video display signal; and
means for alternately enabling and disabling the tuner at least once for each video frame conveyed in the television signal to enable reception of a first portion of video information conveyed in the television signal and to disable reception of a second portion of the video information.