Integrated circuit structure having bottle-shaped isolation
An integrated circuit structure comprises a semiconductor substrate, a device region positioned in the semiconductor substrate, an insulating region adjacent to the device region, an isolation structure positioned in the insulating region and including a bottle portion and a neck portion filled with a dielectric material, and a dielectric layer sandwiched between the device region and the insulation region.
1. An integrated circuit structure, comprising:
a semiconductor substrate;
a device region positioned in the semiconductor substrate;
a mushroom-shaped pillar having an undercut positioned in the device region;
an insulating region adjacent to the device region;
an isolation structure positioned in the insulating region and including a bottle portion and a neck portion filled with a dielectric material; and
a dielectric layer sandwiched between the device region and the neck portion of the isolation structure.
2. The integrated circuit structure of claim 1 , wherein the device region is positioned in an upper position of the mushroom-shaped pillar.
3. The integrated circuit structure of claim 1 , wherein the mushroom-shaped pillar includes a stem portion and a head portion on the stem portion.
4. The integrated circuit structure of claim 3 , wherein the width of the head portion is larger than that of the stem portion.
5. The integrated circuit structure of claim 3 , wherein the width of the stem portion changes gradually.
6. The integrated circuit structure of claim 1 , wherein the dielectric material is a spin on dielectric.
7. The integrated circuit structure of claim 1 , further comprising a silicon oxide layer sandwiched between the isolation structure and the mushroom-shaped pillar.
8. The integrated circuit structure of claim 7 , wherein the silicon oxide layer has a higher resistance to an acidic etchant than does the dielectric material.
9. The integrated circuit structure of claim 1 , further comprising a transistor structure formed in the device region, and having a gate oxide layer, a gate stack, and two diffusion regions.
10. An integrated circuit structure, comprising:
a semiconductor substrate;
a device region positioned in the semiconductor substrate;
a mushroom-shaped pillar having an undercut positioned in the device region, and including a stem portion and a head portion on the stem portion;
an insulating region adjacent to the device region;
an isolation structure positioned in the insulating region and including a bottle portion and a neck portion on the bottle portion;
a dielectric layer sandwiched between the device region and the neck portion of the isolation structure; and
an insulation layer sandwiched between the bottle portion of the isolation structure and the mushroom-shaped pillar.
11. The integrated circuit structure of claim 10 , wherein the insulation layer is made of an insulating material having a stronger acid-resistance than the isolation structure.
12. The integrated circuit structure of claim 10 , wherein the width of the head portion is larger than that of the stem portion.
13. The integrated circuit structure of claim 10 , further comprising a transistor structure formed in the device region, and having a gate oxide layer, a gate stack, and two diffusion regions.
14. An integrated circuit structure, comprising:
a semiconductor substrate;
a device region positioned in the semiconductor substrate;
a mushroom-shaped pillar positioned in the device region, and including a stem portion and a head portion on the stem portion;
an insulating region adjacent to the device region;
an isolation structure positioned in the insulating region and including a bottle portion and a neck portion on the bottle portion;
a dielectric layer sandwiched between the device region and the insulation region; and
wherein the stem portion of the mushroom-shaped pillar is made of an insulating material, and the head portion of the mushroom-shaped pillar is surrounded by the dielectric layer.
15. The integrated circuit structure of claim 14 , wherein the insulating material having a stronger acid-resistance than the isolation structure.
16. The integrated circuit structure of claim 14 , wherein the width of the head portion is larger than that of the stem portion.
17. The integrated circuit structure of claim 14 , further comprising a transistor structure formed in the device region, and having a gate oxide layer, a gate stack, and two diffusion regions.
18. The integrated circuit structure of claim 17 , wherein the diffusion regions are formed in the head portion of the mushroom-shaped pillar.