Detector of abnormal destruction of memory sectors

1. An integrated circuit including at least one microprocessor linked to at least one non-volatile memory having a plurality of sectors and being accessible by sector, comprising:

means for detecting bad sectors in the at least one non-volatile memory;

means for evaluating a proximity of the bad sectors between or among one another in a portion of the non-volatile memory; and

a threshold detector for determining when a threshold number of bad sectors has been exceeded in the non-volatile memory in accordance with the evaluated proximity.

2. An integrated circuit according to claim 1 , wherein the integrated circuit includes a degradation register which is incremented every time the detection means detect a bad sector.

3. The integrated circuit according to claim 2 , wherein the means of detecting use a software program to manage the non-volatile memory.

4. The integrated circuit according to claim 2 , wherein the means of detecting include means for performing a scan of the non-volatile memory to search for the bad sectors.

5. The integrated circuit according to claim 4 , wherein the scan is carried out according to a memory sampling plan.

6. The integrated circuit according to claim 4 , wherein the scan is performed periodically or every time a specific event occurs.

7. The integrated circuit according to claim 2 , wherein at least the degradation register is implemented on a memory other than the non-volatile memory which is under a control of the threshold detector.

8. The integrated circuit according to claim 2 , wherein an integrity check is performed at least on the degradation register.

9. The integrated circuit according to claim 2 , wherein the integrated circuit includes means for evaluating usage of the non-volatile memory, and the threshold detector discovers when the threshold number of bad sectors has been exceeded by comparison with the evaluated usage.

10. The integrated circuit according to claim 4 , wherein the integrated circuit includes means for evaluating usage of the non-volatile memory, and the threshold detector discovers when the threshold number of bad sectors has been exceeded by comparison with the evaluated usage.

11. The integrated circuit according to claim 10 , wherein the scan of the memory is triggered after a predetermined amount of uses.

12. The integrated circuit according to claim 1 , wherein operations to discover when the threshold number is exceeded are performed a plurality of times.

13. The integrated circuit according to claim 1 , wherein the threshold number is calculated from a maximum number of bad sectors supplied by a memory manufacturer.

14. The integrated circuit according to claim 1 , wherein the integrated circuit includes means for evaluating usage of the non-volatile memory, and the threshold detector discovers when the threshold number of bad sectors has been exceeded by comparison with the evaluated usage.

15. The integrated circuit according to claim 14 , wherein a degradation register is configured to keep a record of the number of bad sectors and the threshold detector discovers when the threshold number of bad sectors has been exceeded, the threshold number of bad sectors being set based on different types of evaluated usage of the non-volatile memory.

16. The integrated circuit according to claim 14 , wherein a usage register is incremented every time the non-volatile memory is used for writing or reading.

17. The integrated circuit according to claim 16 , wherein an incrementation of the usage register is weighted according to a type of evaluated usage.

18. The integrated circuit according to claim 1 , wherein the threshold detector is capable of discovering when the threshold number of bad sectors has been exceeded in a geometric portion of the non-volatile memory.

19. The integrated circuit according to claim 1 , wherein the threshold detector triggers a modification in a control register intended to be read by the at least one microprocessor during a specific event.

20. The integrated circuit according to claim 1 , wherein the threshold detector triggers actions in the at least one microprocessor.

21. A method of determining whether an attack has occurred on a non-volatile memory having a plurality of sectors and accessible by sector in an integrated circuit with a microprocessor, the method comprising the steps of:

detecting bad sectors in the non-volatile memory;

evaluating a proximity of the bad sectors between or among one another;

determining a threshold number of bad sectors in accordance with the evaluated proximity;

determining a number of bad sectors in a portion of the non-volatile memory;

comparing the number of bad sectors with the threshold number of bad sectors, as a comparison result; and

determining whether the attack has occurred based on the comparison result.

22. A tangible computer-readable medium encoded with a program comprising instructions for performing the steps of the attack determination method according to claim 21 when said program is run by the integrated circuit.

23. An integrated circuit for use with a non-volatile memory having a plurality of sectors, comprising:

a microprocessor linked to the non-volatile memory; and

a detector for:

(1) detecting and locating bad sectors in the non-volatile memory;

(2) determining an expected number of bad sectors for a portion of the non-volatile memory based on a size of the portion; and

(3) comparing a number of the bad sectors located in the portion of the non-volatile memory to the expected number of bad sectors to determine whether a threshold is exceeded.

24. The integrated circuit according to claim 23 , wherein the microprocessor determines whether an attack has occurred on the non-volatile memory in response the threshold being exceeded.