Semiconductor device with heterojunctions and an inter-finger structure
View Patent ↗A semiconductor device including, on at least one surface of a crystalline semiconductor substrate, at least one first amorphous semiconductor region doped with a first type of conductivity. The semiconductor substrate includes, on the same at least one surface, at least one second amorphous semiconductor region doped with a second type of conductivity, opposite the first type of conductivity. The first amorphous semiconductor region, insulated for the second amorphous semiconductor region by at least ore dielectric region in the contact with the semiconductor substrate, and the second amorphous semiconductor region form an interdigitated structure.
1. A semiconductor device comprising, on at least one surface of a crystalline semiconductor substrate:
at least one first amorphous semiconductor region doped with a first type of conductivity, which semiconductor substrate comprises, on a same at least one surface;
at least one second amorphous semiconductor region doped with a second type of conductivity, opposite the first type of conductivity,
wherein the first amorphous semiconductor region, insulated from the second amorphous semiconductor region by at least one dielectric region in contact with the semiconductor substrate also ensuring passivation of the surface of the substrate, and the second amorphous semiconductor region form an interdigitated structure;
at least one first metallization area in contact with the first amorphous semiconductor region,
at least one second metallization area in contact with the second amorphous semiconductor region;
at least one first conductive thermal oxide area located between the first metallization area and the first amorphous semiconductor region; and
at least one second conductive thermal oxide area located between the second metallization area and the second amorphous semiconductor region.
2. A semiconductor device according to claim 1 , wherein the at least one dielectric region is made of silicon oxide, silicon nitride, or amorphous crystalline silicon.
3. A semiconductor device according to claim 1 , the semiconductor substrate further comprising, on another surface, opposite the surface having the interdigitated structure, a surface passivation layer coated with an antireflective layer.
4. A semiconductor device according to claim 3 , wherein the surface passivation layer is made of an intrinsic amorphous semiconductor with the first type of conductivity or the second type of conductivity.
5. A semiconductor device according to claim 1 , further comprising intrinsic semiconductor regions placed between the at least one first and second amorphous semiconductor regions and the substrate.
6. A semiconductor device according to claim 1 , wherein the semiconductor device is a solar cell.