IP Library Granted Patent US 7,947,578
Granted Patent B2
US 7,947,578 · App. 12/750,011 · Granted May 24, 2011

Method for fabricating semiconductor device

Assignee: Sumitomo Electric Device Innovations, Inc.
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Quick Facts
Patent No.
US 7,947,578
App. No.
12/750,011
Granted
May 24, 2011
Kind
B2
Abstract

A method for fabricating a semiconductor device including: cleaning an apparatus used to grow a layer including Ga; performing a first step of forming a first layer on a substrate made of silicon by using the apparatus, the first layer including a nitride semiconductor that does not include Ga as a composition element and has a Ga impurity concentration of 2×10 18 atoms/cm 3 or less; and performing a second step of forming a second layer on the first layer by using the apparatus after the first step is repeatedly carried out multiple times, the second layer including a nitride semiconductor including Ga.

Claims (25)

1. A method for fabricating a semiconductor device comprising:

cleaning an apparatus used to grow a layer including Ga;

performing a first step of forming a first layer on a substrate made of silicon by using the apparatus, the first layer including a nitride semiconductor that does not include Ga as a composition element and has a Ga impurity concentration of 2×10 18 atoms/cm 3 or less; and

performing a second step of forming a second layer on the first layer by using the apparatus after the first step is repeatedly carried out multiple times, the second layer including a nitride semiconductor including Ga.

2. The method according to claim 1 , further comprising performing a third step of forming a third layer on the first layer by using the apparatus after the first step is carried out and before the second step is carried out, the third layer not having Ga as a composition element, wherein the second step and the third step are successively carried out, and the second layer is formed on the third layer.

3. The method according to claim 2 , wherein the third layer is 150 nm or less.

4. The method according to claim 2 , wherein the third layer is made of composition elements identical to those of the first layer.

5. The method according to claim 1 , wherein the first layer comprises AlN.

6. The method according to claim 1 , wherein the second layer comprises at least one of GaN, InGaN, AlGaN and InAlGaN.

7. The method according to claim 1 , wherein the apparatus is one of an HVPE apparatus, an MOCVD apparatus, and an MBE apparatus.

8. The method according to claim 1 , wherein the apparatus used in the first step is an MOCVD apparatus, and a content of Ga to Al in an organic source material of Al is 2 ppm or less.

9. The method according to claim 1 , wherein the apparatus used in the first step is an MBE apparatus, and a content of Ga to Al in an organic source material of Al is 40 ppm or less.

10. The method according to claim 1 , wherein the first layer is 200 nm or less.

11. A method for fabricating a semiconductor device comprising:

performing a first step of forming a first layer on a substrate made of silicon by using an apparatus, the first layer including a nitride semiconductor that does not include Ga as a composition element and has a Ga impurity concentration of 2×10 18 atoms/cm 3 or less; and

performing a second step of forming a second layer on the first layer by using another apparatus, the second layer including a nitride semiconductor including Ga.

12. The method according to claim 11 , further comprising a third step of forming a third layer on the first layer by using the another apparatus after the first step is carried out and before the second step is carried out, the third layer not having Ga as a composition element, wherein the second step and the third step are successively carried out, and the second layer is formed on the third layer.

13. The method according to claim 12 , wherein the third layer is 150 nm or less.

14. The method according to claim 12 , wherein the third layer is made of composition elements identical to those of the first layer.

15. The method according to claim 11 , wherein the first layer comprises AlN.

16. The method according to claim 11 , wherein the second layer comprises at least one of GaN, InGaN, AlGaN and InAlGaN.

17. The method according to claim 11 , wherein the apparatus is one of an HVPE apparatus, an MOCVD apparatus, and an MBE apparatus.

18. The method according to claim 11 , wherein the apparatus used in the first step is an MOCVD apparatus, and a content of Ga to Al in an organic source material of Al is 2 ppm or less.

19. The method according to claim 11 , wherein the apparatus used in the first step is an MBE apparatus, and a content of Ga to Al in an organic source material of Al is 40 ppm or less.

20. The method according to claim 11 , wherein the first layer is 200 nm or less.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 1, 2010
From: MAKABE, ISAO; NAKATA, KEN; KOUCHI, TSUYOSHI
To: SUMITOMO ELECTRIC DEVICE INNOVATIONS, INC.
Reel/Frame 024172/0606 →
Priority Claims (1)
JP 2009-087933 · Mar 31, 2009 · national
Continuity (1)
Related Publication 20100248459A1 · Sep 30, 2010