Liquid crystal display device and method for fabricating the same
An LCD device is disclosed, to minimize the signal distortion by decreasing the instability of voltage in a—Si:H TFT of a gate driving signal output unit, which includes a signal controller for outputting first and second control signals Q and /Q; a pull-up transistor between a clock signal terminal CLK and a gate driving signal output terminal for receiving the first control signal Q, the pull-up transistor having a first gate electrode, a first source electrode and a first drain electrode, wherein the pull-up transistor has an asymmetric structure in a first area of the first source electrode overlapped with the first gate electrode and a second area of the first drain electrode overlapped with the first gate electrode; and a pull-down transistor connected between the gate driving signal output terminal and a ground voltage terminal, wherein the pull-down transistor receives the second control signal.
1. A liquid crystal display (LCD) device, comprising:
a signal controller for outputting first and second control signals Q and /Q;
a pull-up transistor between a clock signal terminal CLK and a gate driving signal output terminal for receiving the first control signal Q, the pull-up transistor having a gate electrode, a source electrode and a drain electrode, wherein the pull-up transistor has an asymmetric structure in a first area of the source electrode overlapped with the gate electrode and a second area of the drain electrode overlapped with the gate electrode so that a first capacitor overlapping the gate electrode with the source electrode is different from a second capacitor overlapping the gate electrode with the drain electrode; and
a pull-down transistor connected between the gate driving signal output terminal and a ground voltage terminal, wherein the pull-down transistor receives the second control signal,
wherein each of the source and drain electrodes has a single layer.
2. The LCD device of claim 1 , wherein the first area is smaller than the second area.
3. The LCD device of claim 2 , wherein the second area is about one and a half times as large as the first area.
4. The LCD device of claim 1 , wherein the pull-up transistor and the pull-down transistor are a—Si:H TFTs.
5. The LCD device of claim 1 , wherein the pull-down transistor includes a gate electrode for receiving the second control signal /Q, a drain electrode connected with the gate driving signal output terminal, and a source electrode connected with a grounding terminal, and a third area of the drain electrode overlapped with the gate electrode is smaller than a fourth area of the source electrode overlapped with the gate electrode.
6. The LCD device of claim 5 , wherein the fourth area is about one and a half times as large as the third area.
7. The LCD device of claim 1 , wherein the pull-up transistor includes:
the gate electrode formed on a lower substrate;
a gate insulating layer on the lower substrate including the gate electrode;
a first active layer on the gate insulating layer above the gate electrode;
the source electrode formed on one side of the first active layer, wherein the source electrode is overlapped with the gate electrode corresponding to the first area; and
the drain electrode formed on the other side of the first active layer, wherein the drain electrode is overlapped with the gate electrode corresponding to the second area.
8. The LCD device of claim 7 , further comprising an ohmic contact layer between the first active layer and the source and drain electrodes.
9. The LCD device of claim 8 , wherein the first active layer is formed of an amorphous silicon layer, and the ohmic contact layer is formed of an n-type amorphous silicon layer.