Semiconductor device and method of assembly

1. A method of producing a semiconductor device, comprising:

attaching a lower surface of a first semiconductor die to a first adhesive tape;

attaching a lower surface of a second semiconductor die to the first adhesive tape adjacent to the first semiconductor die;

forming a wire bond between an upper surface of the first semiconductor die and an upper surface of the second semiconductor die;

encapsulating the first and second semiconductor dies in encapsulation material to form a panel, the panel having a first surface and a second surface, wherein the second surface of the panel is attached to the first adhesive tape;

depositing a metallization layer on the lower surface of the first die; and

depositing a metallization layer on the lower surface of the second die;

wherein depositing the metallization layers includes:

depositing a first metallization layer by a vacuum deposition process; and

depositing a second metallization layer by an electroplating process.

2. A method of producing a semiconductor device, comprising:

attaching a lower surface of a first semiconductor die to a first adhesive tape;

attaching a lower surface of a second semiconductor die to the first adhesive tape adjacent to the first semiconductor die;

forming a wire bond between an upper surface of the first semiconductor die and an upper surface of the second semiconductor die;

encapsulating the first and second semiconductor dies in encapsulation material to form a panel, the panel having a first surface and a second surface, wherein the second surface of the panel is attached to the first adhesive tape;

depositing a metallization layer on the lower surface of the first die; and

depositing a metallization layer on the lower surface of the second die;

wherein depositing the metallization layer includes:

depositing a first metallization layer by a vacuum deposition process; and

depositing a second metallization layer by a galvanic deposition process.

3. A method of producing a semiconductor device, comprising:

attaching a lower surface of a first semiconductor die to a first adhesive tape;

attaching a lower surface of a second semiconductor die to the first adhesive tape adjacent to the first semiconductor die;

forming a wire bond between an upper surface of the first semiconductor die and an upper surface of the second semiconductor die;

encapsulating the first and second semiconductor dies in encapsulation material to form a panel, the panel having a first surface and a second surface, wherein the second surface of the panel is attached to the first adhesive tape;

attaching the lower surfaces of a plurality of the first semiconductor dies to the first adhesive tape;

attaching the lower surfaces of a plurality of the second semiconductor dies to the first adhesive tape; and

forming wire bonds between the upper surfaces of pairs of the first and second semiconductor dies, wherein respective pairs of the wire bonded first and second semiconductor dies form components.

4. The method of claim 3 , further comprising depositing a metallization layer on the lower surface of the first die and depositing a metallization layer on the lower surface of the second die.

5. The method of claim 4 , wherein depositing the metallization layer includes:

depositing a first metallization layer by a vacuum deposition process; and

depositing a second metallization layer by an electroplating process.

6. The method of claim 3 , further comprising:

removing the first adhesive tape from the second surface of the panel; and

attaching a second adhesive tape to the first surface of the panel.

7. The method of claim 6 , further comprising:

singulating the components from the panel to form packages attached to the second adhesive tape; and

removing the packages from the second adhesive tape and packing the packages into packing tape.

8. The method of claim 7 , wherein the second adhesive tape is removed by irradiating the tape by UV irradiation.

9. A semiconductor device, comprising:

a first semiconductor die having an upper surface and a lower surface;

a second semiconductor die having an upper surface and a lower surface; and

a wire bond connecting the upper surfaces of the first and second semiconductor dies;

encapsulation material embedding the first and second semiconductor dies, wherein the lower surfaces of the first semiconductor die and the second semiconductor die are essentially coplanar with a lower surface of the encapsulation material;

a plurality of the first semiconductor dies;

a plurality of the second semiconductor dies, each of the second semiconductor dies being wire bonded to a corresponding one of the first semiconductor dies to form components;

wherein the first semiconductor die and the second semiconductor die of each component are separated by a distance; and

wherein the lower surfaces of the first semiconductor dies and the second semiconductor dies are essentially coplanar with a lower surface of the encapsulation material.

10. The semiconductor device of claim 9 , wherein the lower surface of the semiconductor dies and the lower surface of the encapsulation material is attached to a first adhesive tape.

11. The semiconductor device of claim 9 , wherein the first semiconductor dies and the second semiconductor dies have at least one side face with a stepped contour.

12. The semiconductor device of claim 11 , wherein the first semiconductor die and the second semiconductor die have a protruding upper portion.

13. The semiconductor device of claim 11 , wherein the first semiconductor die and the second semiconductor die have a protruding base portion.

14. The semiconductor device of claim 9 , wherein the lower surface of the first semiconductor die and the lower surface of the second semiconductor die includes a metallization layer, the metallization layer and the lower surface of the encapsulation material being essentially coplanar.

15. The semiconductor device of claim 14 , wherein the metallization layer comprises first and second layers, wherein the first layer comprises Ni or a Ni alloy and the second layer comprises silver or a silver alloy or gold or a gold alloy.

16. The semiconductor device of claim 9 , wherein the plurality of first semiconductor dies are receiver dies and the plurality of second semiconductor dies are emitter or conductive dies.

17. The semiconductor device of claim 9 , wherein the device has dimensions of approximately 0.5 mm in width, approximately 0.3 mm in breadth and approximately 0.2 mm in height.