Systems and methods for power hardware in the loop testing
A system for power hardware in the loop testing is described. The system includes a power system and a control system, the power system connected to a power converter of a device under test, the control system being in communication with the power system and the power converter. The control system determines the voltage input to the power system by utilizing the voltage output of the power converter, the voltage input determination being made by a control algorithm comprising. v Ok = Sx k + Pv Ik + Qi Ak + 1 where : S = 1 T ( CL A T C + L B T + R B + R C T + CR C - L B - C L B + R B T T + CR C ) P = 1 + C T + CR C L B + R B T T Q = - L A + R A T T - L B + R B T T - C T + CR C L A + R A T T L B + R B T T
1. A system for power hardware in the loop testing comprising:
a power system and a control system, the power system connected to a power converter of a device under test, the control system being in communication with the power system and the power converter, the control system determining the voltage input to the power system by utilizing the voltage output of the power converter, the voltage input determination being made by a control algorithm comprising
v
Ok
=
Sx
k
+
Pv
Ik
+
Qi
Ak
+
1
where
:
S
=
1
T
(
CL
A
T
C
+
L
B
T
+
R
B
+
R
C
T
+
CR
C
-
L
B
-
C
L
B
+
R
B
T
T
+
CR
C
)
P
=
1
+
C
T
+
CR
C
L
B
+
R
B
T
T
Q
=
-
L
A
+
R
A
T
T
-
L
B
+
R
B
T
T
-
C
T
+
CR
C
L
A
+
R
A
T
T
L
B
+
R
B
T
T
wherein symbols in the equation refer to a circuit for a decoupling filter in the control system with:
V i representing the external voltage;
V o representing the controlled voltage;
the filter inductances modeled like an inductor in series with a resistance whose values are represented by R A and L A for the inductor on the output side and R B and L B for the inductor on the controlled converter side;
the filter capacitor modeled like a capacitor in series with a resistance whose values are C and R C ; and
T representing the discretization time.
2. The system of claim 1 , the power system comprising an RLC filter, an inverter, and a DC bus.
3. The system of claim 1 , the power system comprising a three-phase RLC filter.
4. The system of claim 1 , the control system comprising real-time simulation software.
5. The system of claim 4 , wherein the real-time simulation software comprises VTB-RT.
6. The system of claim 1 , the control system comprising a field programmable gate array, at least part of the control algorithm being executed by the field programmable gate array.
7. The system of claim 1 , wherein the power converter has a power rating of from about 1 kW to about 100 kW.
8. The system of claim 1 , the control system comprising a data acquisition board.
9. The system of claim 1 , wherein the voltage output of the power converter is utilized to determine a reference current.
10. The system of claim 9 , wherein the control algorithm determines the voltage to be applied to the filter to obtain a current that tracks the reference current.
11. A method for power hardware in the loop testing comprising:
measuring the voltage output of a power converter of a device under test;
utilizing a control system to determine the voltage input to a power system, the power system connected to the power converter, the control system being in communication with the power system and the power converter, the voltage input determination being made by a control algorithm comprising
v
Ok
=
Sx
k
+
Pv
Ik
+
Qi
Ak
+
1
where
:
S
=
1
T
(
CL
A
T
C
+
L
B
T
+
R
B
+
R
C
T
+
CR
C
-
L
B
-
C
L
B
+
R
B
T
T
+
CR
C
)
P
=
1
+
C
T
+
CR
C
L
B
+
R
B
T
T
Q
=
-
L
A
+
R
A
T
T
-
L
B
+
R
B
T
T
-
C
T
+
CR
C
L
A
+
R
A
T
T
L
B
+
R
B
T
T
wherein symbols in the equation refer to a circuit for a decoupling filter in the control system with:
V i representing the external voltages
V o representing the controlled voltages;
the filter inductances modeled like an inductor in series with a resistance whose values are represented by R A and L A for the inductor on the output side and R B and L B for the inductor on the controlled converter side;
the filter capacitor modeled like a capacitor in series with a resistance whose values are C and R C ; and
T representing the discretization time.
12. The method of claim 11 , the power system comprising an RLC filter, an inverter, and a DC bus.
13. The method of claim 11 , the power system comprising a three-phase RLC filter.
14. The method of claim 11 , the control system comprising real-time simulation software.
15. The method of claim 14 , wherein the real-time simulation software comprises VTB-RT.
16. The method of claim 11 , the control system comprising a field programmable gate array, at least part of the control algorithm being executed by the field programmable gate array.
17. The method of claim 11 , wherein the power converter has a power rating of from about 1 kW to about 100 kW.
18. The method of claim 11 , the control system comprising a data acquisition board.
19. The method of claim 11 , wherein the voltage output of the power converter is utilized to determine a reference current.
20. The method of claim 19 , wherein the control algorithm determines the voltage to be applied to the filter to obtain a current that tracks the reference current.