IP Library › Granted Patent US 7,989,822
Granted Patent B2
US 7,989,822 · App. 12/291,486 · Granted Aug 2, 2011

Optocoupler using silicon based LEDs

Assignee: Eugene R. Worley
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Quick Facts
Patent No.
US 7,989,822
App. No.
12/291,486
Granted
Aug 2, 2011
Kind
B2
Abstract

This invention details how a low cost opto coupler can be made on Silicon On Insulator (SOI) using conventional integrated circuit processing methods. Specifically, metal and deposited insulating materials are use to realize a top reflector for directing light generated by a silicon PN junction diode to a silicon PN junction photo diode detector. The light generator or LED can be operated either in the avalanche mode or in the forward mode. Also, side reflectors are described as a means to contain the light to the LED-photo detector pair. Furthermore, a serpentine junction PN silicon LED is described for the avalanche mode of the silicon LED. For the forward mode, two LED structures are described in which hole and electrons combine in lightly doped regions away from heavily doped regions thereby increasing the LED conversion efficiency.

Claims (26)

1. A light emitter, comprising:

a layer of silicon comprising an N+ region, a P+ region, and a lightly-doped region between the N+ region and the P+ region;

an anode contact coupled to the P+ region;

a cathode contact coupled to the N+ region;

a gate overlapping the lightly-doped region; and

a gate contact coupled to the gate.

2. The light emitter of claim 1 , wherein the lightly doped region has a doping concentration of between 10 14 to 10 16 impurity atoms per cubic centimeter.

3. The light emitter of claim 1 , wherein the lightly doped region comprises a P− region adjacent to the N+ region and a N− region adjacent to the P+ region.

4. The light emitter of claim 3 , wherein the lightly doped region has a doping concentration of between 10 14 to 10 16 impurity atoms per cubic centimeter.

5. The light emitter of claim 3 , wherein the gate overlaps the P− region.

6. The light emitter of claim 5 , wherein the gate extends from the N+ region to the N− region.

7. The light emitter of claim 3 , wherein the gate overlaps the N− region.

8. The light emitter of claim 3 , further comprising a second gate, wherein the first gate overlaps the N− region and the second gate overlaps the P− region.

9. The light emitter of claim 3 , further comprising an insulating layer, wherein the layer of silicon is disposed on the insulating layer.

10. The light emitter of claim 3 , wherein the insulator layer comprises silicon oxide.

11. The light emitter of claim 10 , further comprising a silicon substrate, wherein the insulating layer is disposed on the silicon substrate.

12. An optocoupler, comprising:

an insulator layer;

a light emitter comprising:

a layer of silicon disposed on the insulator layer, the layer of silicon comprising an N+ region, a P+ region, and a lightly doped between the N+ and P+ regions; and

a gate overlapping the lightly doped or intrinsic region; and

a light detector disposed on the insulator layer and electrically isolated from the layer of silicon, wherein the light detector is configured to convert light emissions from the light emitter into an electrical signal.

13. The optocoupler of claim 12 , wherein the lightly doped comprises a P− region adjacent to the N+ region and a N− region adjacent to the P+ region.

14. The optocoupler of claim 13 , wherein the gate overlaps the N− region.

15. The optocoupler of claim 13 , wherein the gate overlaps the P− region.

16. The optocoupler of claim 13 , further comprising a second gate, wherein the first gate overlaps the N− region and the second gate overlaps the P− region.

Continuity (2)
Provisional Application 61002179 · Nov 8, 2007
Related Publication 20090121236A1 · May 14, 2009