Ultrahigh density patterning of conducting media
View Patent ↗A nanoscale device and a method for creating and erasing of nanoscale conducting regions at the interface between two insulating oxides SrTiO 3 and LaAlO 3 is provided. The method uses the tip of a conducting atomic force microscope to locally and reversibly switch between conducting and insulating states. This allows ultra-high density patterning of quasi zero or one dimensional electron gas conductive regions, such as nanowires and conducting quantum dots respectively. The patterned structures are stable at room temperature after removal of the external electric field.
1. A device comprising:
(A) a first insulating layer and a second insulating layer and, at an interface between said first and second insulating layers,
(B) an electrically conductive, quasi one- or zero-dimensional electron gas,
wherein the first insulating layer comprises a non-polar oxide material and the second insulating layer comprises a polar oxide material that overlays the first insulating layer,
and
wherein the first and second insulating layers comprise materials having perovskite structures that are different from each other.
2. The device of claim 1 , wherein the electrically conductive, quasi one- or zero-dimensional electron gas region is a nanowire or a quantum dot.
3. The device of claim 1 , wherein the electrically conductive, quasi one- or zero-dimensional electron gas has a nanoscale width or diameter.
4. The device of claim 1 , wherein the electrically conductive, quasi one- or zero-dimensional gas has a width of less than 20 nm.
5. The device of claim 4 , wherein the electrically conductive, quasi one- or zero-dimensional electron gas has a width in the range of about 3.3 nm to about 10 nm.
6. The device of claim 5 , wherein said width is about 3.3 nm.
7. The device of claim 1 , wherein the electrically conductive, quasi one- or zero-dimensional electron gas region has a length of about 100 nm to about 100 μm.
8. The device of claim 1 , wherein the electrically conductive, quasi one- or zero-dimensional electron gas has a width or diameter of less than 20 nm.
9. The device of claim 8 , wherein the electrically conductive, quasi one- or zero-dimensional region has a width or diameter in the range of about 1 nm to about 10 nm.
10. The device of claim 9 , wherein said range is about 7 nm to about 10 nm.
11. The device of claim 1 , wherein the electrically conductive, quasi one- or zero-dimensional gas comprises one of a gate of a transistor, a channel of a transistor, a data storage region of a data storage device, an interconnect or electrode of an electronic device, or a conductive region of a passive electronic device.
12. A device comprising:
(A) a first insulating layer and a second insulating layer and, at an interface between said first and second insulating layers,
(B) an electrically conductive, quasi one- or zero-dimensional electron gas,
wherein the first insulating layer comprises a non-polar oxide material and the second insulating layer comprises a polar oxide material that overlays the first insulating layer,
and
wherein the non-polar oxide material comprises SrTiO 3 and the polar oxide material is selected from the group consisting of LaTiO 3 , LaAlO 3 , LaVO 3 , and KTaO 3 .
13. The device of claim 12 , wherein the polar oxide material has a thickness that allows metal-insulator transition.
14. The device of claim 13 , wherein the thickness of the polar oxide material is three unit cells.
15. A device comprising:
a SrTiO 3 layer;
a LaAlO 3 layer overlaying the SrTiO 3 layer, the LaAlO 3 layer having a thickness of three unit cells;
electrodes in contact with the interface between the LaAlO 3 and SrTiO 3 layers; and
a conducting nanowire or an array of conductive quantum dots connecting the electrodes.