IP Library Granted Patent US 8,017,931
Granted Patent B2
US 8,017,931 · App. 10/538,078 · Granted Sep 13, 2011

LED and fabrication method thereof

Assignee: LG Innotek Co., Ltd
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Quick Facts
Patent No.
US 8,017,931
App. No.
10/538,078
Granted
Sep 13, 2011
Kind
B2
Abstract

Disclosed is a quantum-dot LED and fabrication method thereof. The quantum-dot LED includes: a substrate; a n-type semiconductor layer formed on the substrate; an insulator layer formed on the n-type semiconductor layer and provided with a plurality of holes; quantum dots formed by filling the holes; and a p-type semiconductor layer formed on the insulator layer in which the quantum dots are formed. According to the inventive LED, the size and density of the quantum dots are controllable to thereby make the property control of the LED easy. Also, since it can be anticipated that the LED has a high internal quantum efficiency compared with the conventional LED using quantum well, high light emitting efficiency can be obtained.

Claims (22)

1. A quantum-dot LED comprising:

an n-type semiconductor layer;

at least one insulator layer formed on the n-type semiconductor layer and provided with a plurality of holes;

quantum dots formed by filling the holes; and

a p-type semiconductor layer formed on the insulator layer in which the quantum dots are formed,

wherein the p-type semiconductor layer is contacted with the quantum dots, or both the n-type semiconductor layer and the p-type semiconductor layer are contacted with the quantum dots, and

wherein the insulator layer comprises a first insulator layer formed on the n-type semiconductor layer and a second insulator layer formed on the first insulator layer, and the quantum-dot LED comprises a barrier layer inserted between the first insulator layer and the second insulator layer.

2. The quantum-dot LED according to claim 1 , wherein the first and second insulator layers formed interposing the barrier layer therebetween has a multi-layer structure.

3. The quantum-dot LED according to claim 1 , wherein the barrier layer is of one selected from the group consisting of GaN, GaAs and GaP.

4. The quantum-dot LED according to claim 1 , wherein the holes are nano-holes.

5. The quantum-dot LED according to claim 1 , wherein the holes have a size range of 1 nanometer to 100 nanometers.

6. The quantum-dot LED according to claim 1 , wherein the quantum dots are formed from one selected from the group consisting of InGaN, InGaAs and InGaP.

7. The quantum-dot LED according to claim 1 , wherein the quantum dots comprise an upper surface being in direct contact with the p-type semiconductor layer, and a lower surface being in direct contact with the n-type semiconductor layer.

8. The quantum-dot LED according to claim 1 , wherein the size and/or density of the holes are/is determined by deposition time of the insulator layer.

9. A method for fabricating a quantum-dot LED, the method comprising the steps of:

forming an n-type semiconductor layer;

depositing a first insulator layer having first holes on the n-type semiconductor layer;

filling the first holes of the first insulator layer to form first quantum dots, wherein (a) after the step of forming the quantum dots, forming a barrier layer on the insulator layer in which the quantum dots are formed; (b) forming a second insulator layer having second holes on the barrier layer; and (c) filling the second hole of the second insulator layer to form second quantum dots, wherein the steps (a), (b) and (c) are repeated at least once; and

depositing a p-type semiconductor layer on the first insulator layer in which the quantum dots are formed,

wherein the p-type semiconductor layer is contacted with the quantum dots, or both the n-type semiconductor layer and the p-type semiconductor layer are contacted with the quantum dots.

10. The method according to claim 9 , wherein in the step of depositing the insulator layers, the size and/or density are/is determined by deposition time of the insulator layer.

11. The method according to claim 9 , wherein the first quantum dots comprise an upper surface being in direct contact with the p-type semiconductor layer, and a lower surface being in direct contact with the n-type semiconductor layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 9, 2005
From: CHOI, SUNG CHUL
To: LG INNOTEK CO., LTD
Reel/Frame 016887/0298 →
Priority Claims (1)
KR 10-2002-0078067 · Dec 10, 2002 · national
Continuity (1)
Related Publication 20060163560A1 · Jul 27, 2006